aboutsummaryrefslogtreecommitdiff
path: root/src/codegen.zig
AgeCommit message (Expand)Author
2021-01-17stage2 aarch64: add basic genSetStackJakub Konka
2021-01-16stage2: implement error notes and regress -femit-zirAndrew Kelley
2021-01-16stage2 ARM: add extra load/store instructionsjoachimschmidt557
2021-01-16stage2 AArch64: add very basic return valuesjoachimschmidt557
2021-01-13macho: add x86_64 supportJakub Konka
2021-01-13macho: document more code + add test caseJakub Konka
2021-01-13macho: refactor writing and managing externsJakub Konka
2021-01-13macho: write out stubs for new externs onlyJakub Konka
2021-01-13macho: populate stubs and stub_helperJakub Konka
2021-01-13stage2: lay the groundwork in prep for extern fnJakub Konka
2021-01-10stage2: fix bug in genArgjoachimschmidt557
2021-01-06Merge pull request #7622 from tetsuo-cpp/array-hash-map-improvementsAndrew Kelley
2021-01-06stage2 ARM: fix stack offsets for genSetReg and genSetStackjoachimschmidt557
2021-01-06stage2 ARM: fix offsets in exitlude jump relocationsjoachimschmidt557
2021-01-06std: Support equivalent ArrayList operations in ArrayHashMapAlex Cameron
2021-01-03stage2 x86_64: fix bug in Function.genjoachimschmidt557
2021-01-03stage2: implement basic function params aarch64Jakub Konka
2021-01-02stage2: re-use ZIR for comptime and inline callsAndrew Kelley
2021-01-02stage2: implement function call inlining in the frontendAndrew Kelley
2021-01-02stage2: Use {s} instead of {} when formatting stringsLemonBoy
2021-01-01stage2 AArch64: add logical (shifted register) instructionsjoachimschmidt557
2021-01-01stage2 ARM: implement genSetReg with compare_flagsjoachimschmidt557
2021-01-01stage2 ARM: implement genCondBr for compare_flagsjoachimschmidt557
2021-01-01stage2 ARM: implement genCondBrjoachimschmidt557
2020-12-30stage2: rework Value Payload layoutAndrew Kelley
2020-12-30stage2: rework Type Payload layoutAndrew Kelley
2020-12-21stage2 ARM: implement basic binary bitwise operationsjoachimschmidt557
2020-12-09stage2+aarch64: clean up offset helper structsJakub Konka
2020-12-09stage2+aarch64: fix stage2 testsJakub Konka
2020-12-09stage2+aarch64: use stp and ldp to navigate MachO jump tableJakub Konka
2020-12-03Merge pull request #7273 from kubkon/lld-codesig-pocAndrew Kelley
2020-12-02stage2: wire up -Dskip-non-nativeAndrew Kelley
2020-12-01lld: use commands.LoadCommand in self-hosted linkerJakub Konka
2020-11-28stage2 ARM: use strb + implement genBoolOpjoachimschmidt557
2020-11-28stage2 ARM: Implement genNotjoachimschmidt557
2020-11-28stage2 codegen: use switch in genBoolOpjoachimschmidt557
2020-11-28stage2 ARM: genAdd, genSub for simple casesjoachimschmidt557
2020-11-27stage2 macho: apply more review commentsJakub Konka
2020-11-27Update src/codegen.zigJakub Konka
2020-11-26stage2 macho: move PIE fixups to link file; fix testsJakub Konka
2020-11-26stage2 macho: add orr and orn instructionsJakub Konka
2020-11-26stage2 macho: Hello, Silicon!Jakub Konka
2020-11-26stage2 macho: refactor PIE generation on x86_64Jakub Konka
2020-11-26stage2 macho: first, rough draft at trampoliningJakub Konka
2020-11-26stage2 macho: use RIP-relative for memory-set regs x86_64Jakub Konka
2020-11-19Add builtin.Signedness, use it instead of is_signedTadeo Kondrak
2020-11-16Move leb128 and remove trivial *mem functions as discussed in #5588 (#6876)tgschultz
2020-11-11stage2 aarch64: add genCall for aarch64 MachOJakub Konka
2020-11-11stage2 aarch64: add .memory prong in genSetRegJakub Konka
2020-11-11stage2 ARM: start implementing genCall for ELF + genSetReg immediatesjoachimschmidt557
generated by cgit v1.2.3 (git 2.39.1) at 2025-12-27 23:23:56 +0000