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| author | Jakub Konka <kubkon@jakubkonka.com> | 2020-12-09 17:15:00 +0100 |
|---|---|---|
| committer | Jakub Konka <kubkon@jakubkonka.com> | 2020-12-09 17:21:21 +0100 |
| commit | 2082c275577163a3c3006ae15b0c8af51a414f7d (patch) | |
| tree | fddfdf3e5970fc478d0b6cf66c12e8f3acc9034d /src/codegen.zig | |
| parent | e91dbab256354477fdac0849f43766f43a7df8f0 (diff) | |
| download | zig-2082c275577163a3c3006ae15b0c8af51a414f7d.tar.gz zig-2082c275577163a3c3006ae15b0c8af51a414f7d.zip | |
stage2+aarch64: clean up offset helper structs
Diffstat (limited to 'src/codegen.zig')
| -rw-r--r-- | src/codegen.zig | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/src/codegen.zig b/src/codegen.zig index 8dfda6ceae..3b0a383a71 100644 --- a/src/codegen.zig +++ b/src/codegen.zig @@ -2736,7 +2736,7 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type { // https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/using-the-stack-in-aarch64-implementing-push-and-pop) // str x28, [sp, #-16] mem.writeIntLittle(u32, try self.code.addManyAsArray(4), Instruction.str(.x28, Register.sp, .{ - .offset = Instruction.Offset.imm_pre_index(-16), + .offset = Instruction.LoadStoreOffset.imm_pre_index(-16), }).toU32()); // adr x28, #8 mem.writeIntLittle(u32, try self.code.addManyAsArray(4), Instruction.adr(.x28, 8).toU32()); @@ -2760,7 +2760,7 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type { // ldr x28, [sp], #16 mem.writeIntLittle(u32, try self.code.addManyAsArray(4), Instruction.ldr(.x28, .{ .rn = Register.sp, - .offset = Instruction.Offset.imm_post_index(16), + .offset = Instruction.LoadStoreOffset.imm_post_index(16), }).toU32()); } else { // stp x0, x28, [sp, #-16] @@ -2768,8 +2768,7 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type { .x0, .x28, Register.sp, - -16, - .PreIndex, + Instruction.LoadStorePairOffset.pre_index(-16), ).toU32()); // adr x28, #8 mem.writeIntLittle(u32, try self.code.addManyAsArray(4), Instruction.adr(.x28, 8).toU32()); @@ -2795,8 +2794,7 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type { .x0, .x28, Register.sp, - 16, - .PostIndex, + Instruction.LoadStorePairOffset.post_index(16), ).toU32()); } } else { |