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path: root/src/arch/riscv64/Mir.zig
AgeCommit message (Expand)Author
2023-06-24all: migrate code to new cast builtin syntaxmlugg
2023-03-04add @trap builtinr00ster91
2022-12-17std.builtin: rename Type.UnionField and Type.StructField's field_type to typer00ster91
2022-03-19stage2 RISCV64: implement add, sub for registersjoachimschmidt557
2022-03-19stage2 RISCV64: implement move register to registerjoachimschmidt557
2021-11-30allocgate: std Allocator interface refactorLee Cannon
2021-11-20stage2 RISCV64: implement basic function prologue and epiloguejoachimschmidt557
2021-11-05stage2 RISCV64: introduce MIRjoachimschmidt557