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| author | Vexu <15308111+Vexu@users.noreply.github.com> | 2019-08-16 20:02:47 +0300 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-08-16 20:02:47 +0300 |
| commit | c3407ed09775926d60cf3657a0d4fd6048cc6077 (patch) | |
| tree | bc9ba2bcd5569973986d692cbb5c24ffe19342eb /src/zig_llvm.cpp | |
| parent | f8e753e19c013cc605a951e5038b4a26099aa135 (diff) | |
| parent | 2cb1f93894be3f48f0c49004515fa5e8190f69d9 (diff) | |
| download | zig-c3407ed09775926d60cf3657a0d4fd6048cc6077.tar.gz zig-c3407ed09775926d60cf3657a0d4fd6048cc6077.zip | |
Merge branch 'master' into comment-in-array
Diffstat (limited to 'src/zig_llvm.cpp')
| -rw-r--r-- | src/zig_llvm.cpp | 25 |
1 files changed, 15 insertions, 10 deletions
diff --git a/src/zig_llvm.cpp b/src/zig_llvm.cpp index c51c9e1a50..d9315ff549 100644 --- a/src/zig_llvm.cpp +++ b/src/zig_llvm.cpp @@ -42,7 +42,6 @@ #include <llvm/Support/TargetRegistry.h> #include <llvm/Target/TargetMachine.h> #include <llvm/Target/CodeGenCWrappers.h> -#include <llvm/Transforms/Coroutines.h> #include <llvm/Transforms/IPO.h> #include <llvm/Transforms/IPO/AlwaysInliner.h> #include <llvm/Transforms/IPO/PassManagerBuilder.h> @@ -203,8 +202,6 @@ bool ZigLLVMTargetMachineEmitToFile(LLVMTargetMachineRef targ_machine_ref, LLVMM PMBuilder->Inliner = createFunctionInliningPass(PMBuilder->OptLevel, PMBuilder->SizeLevel, false); } - addCoroutinePassesToExtensionPoints(*PMBuilder); - // Set up the per-function pass manager. legacy::FunctionPassManager FPM = legacy::FunctionPassManager(module); auto tliwp = new(std::nothrow) TargetLibraryInfoWrapperPass(tlii); @@ -788,23 +785,23 @@ const char *ZigLLVMGetSubArchTypeName(ZigLLVM_SubArchType sub_arch) { case ZigLLVM_NoSubArch: return ""; case ZigLLVM_ARMSubArch_v8_5a: - return "v8_5a"; + return "v8.5a"; case ZigLLVM_ARMSubArch_v8_4a: - return "v8_4a"; + return "v8.4a"; case ZigLLVM_ARMSubArch_v8_3a: - return "v8_3a"; + return "v8.3a"; case ZigLLVM_ARMSubArch_v8_2a: - return "v8_2a"; + return "v8.2a"; case ZigLLVM_ARMSubArch_v8_1a: - return "v8_1a"; + return "v8.1a"; case ZigLLVM_ARMSubArch_v8: return "v8"; case ZigLLVM_ARMSubArch_v8r: return "v8r"; case ZigLLVM_ARMSubArch_v8m_baseline: - return "v8m_baseline"; + return "v8m.base"; case ZigLLVM_ARMSubArch_v8m_mainline: - return "v8m_mainline"; + return "v8m.main"; case ZigLLVM_ARMSubArch_v7: return "v7"; case ZigLLVM_ARMSubArch_v7em: @@ -898,6 +895,14 @@ LLVMValueRef ZigLLVMBuildAShrExact(LLVMBuilderRef builder, LLVMValueRef LHS, LLV return wrap(unwrap(builder)->CreateAShr(unwrap(LHS), unwrap(RHS), name, true)); } +void ZigLLVMSetTailCall(LLVMValueRef Call) { + unwrap<CallInst>(Call)->setTailCallKind(CallInst::TCK_MustTail); +} + +void ZigLLVMFunctionSetPrefixData(LLVMValueRef function, LLVMValueRef data) { + unwrap<Function>(function)->setPrefixData(unwrap<Constant>(data)); +} + class MyOStream: public raw_ostream { public: |