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| author | Jakub Konka <kubkon@jakubkonka.com> | 2024-02-17 11:43:18 +0100 |
|---|---|---|
| committer | Jakub Konka <kubkon@jakubkonka.com> | 2024-02-17 11:46:01 +0100 |
| commit | 9542ee9bf87424f89b7ca182944fe825193a5702 (patch) | |
| tree | bdad4881b0874730e18b9fb7e46d738f4055eb86 /src/link | |
| parent | ace1a69a55dd77a8189b7408b126d9d1ca0066ee (diff) | |
| download | zig-9542ee9bf87424f89b7ca182944fe825193a5702.tar.gz zig-9542ee9bf87424f89b7ca182944fe825193a5702.zip | |
elf: create Zig specific reloc type shared across ISAs
Diffstat (limited to 'src/link')
| -rw-r--r-- | src/link/Elf.zig | 5 | ||||
| -rw-r--r-- | src/link/Elf/Atom.zig | 8 | ||||
| -rw-r--r-- | src/link/Elf/relocation.zig | 2 |
3 files changed, 8 insertions, 7 deletions
diff --git a/src/link/Elf.zig b/src/link/Elf.zig index 2ae15a3200..a6625556e6 100644 --- a/src/link/Elf.zig +++ b/src/link/Elf.zig @@ -6065,8 +6065,9 @@ const RelaSection = struct { }; const RelaSectionTable = std.AutoArrayHashMapUnmanaged(u32, RelaSection); -pub const R_X86_64_ZIG_GOT32: u32 = 0xff00; -pub const R_X86_64_ZIG_GOTPCREL: u32 = 0xff01; +// TODO: add comptime check we don't clobber any reloc for any ISA +pub const R_ZIG_GOT32: u32 = 0xff00; +pub const R_ZIG_GOTPCREL: u32 = 0xff01; fn defaultEntrySymbolName(cpu_arch: std.Target.Cpu.Arch) []const u8 { return switch (cpu_arch) { diff --git a/src/link/Elf/Atom.zig b/src/link/Elf/Atom.zig index debdb22ad8..a86d0722ff 100644 --- a/src/link/Elf/Atom.zig +++ b/src/link/Elf/Atom.zig @@ -968,8 +968,8 @@ const x86_64 = struct { else => |x| switch (@intFromEnum(x)) { // Zig custom relocations - Elf.R_X86_64_ZIG_GOT32, - Elf.R_X86_64_ZIG_GOTPCREL, + Elf.R_ZIG_GOT32, + Elf.R_ZIG_GOTPCREL, => { assert(symbol.flags.has_zig_got); }, @@ -1153,8 +1153,8 @@ const x86_64 = struct { else => |x| switch (@intFromEnum(x)) { // Zig custom relocations - Elf.R_X86_64_ZIG_GOT32 => try cwriter.writeInt(u32, @as(u32, @intCast(ZIG_GOT + A)), .little), - Elf.R_X86_64_ZIG_GOTPCREL => try cwriter.writeInt(i32, @as(i32, @intCast(ZIG_GOT + A - P)), .little), + Elf.R_ZIG_GOT32 => try cwriter.writeInt(u32, @as(u32, @intCast(ZIG_GOT + A)), .little), + Elf.R_ZIG_GOTPCREL => try cwriter.writeInt(i32, @as(i32, @intCast(ZIG_GOT + A - P)), .little), else => {}, }, diff --git a/src/link/Elf/relocation.zig b/src/link/Elf/relocation.zig index b7b0ecf2f5..b6803f9166 100644 --- a/src/link/Elf/relocation.zig +++ b/src/link/Elf/relocation.zig @@ -55,7 +55,7 @@ const aarch64_relocs = Table(10, elf.R_AARCH64, .{ .{ .tlsdesc, .R_AARCH64_TLSDESC }, }); -const riscv64_relocs = Table(8, elf.R_RISCV, .{ +const riscv64_relocs = Table(9, elf.R_RISCV, .{ .{ .abs, .R_RISCV_64 }, .{ .copy, .R_RISCV_COPY }, .{ .rel, .R_RISCV_RELATIVE }, |