aboutsummaryrefslogtreecommitdiff
path: root/src/codegen
diff options
context:
space:
mode:
authorJakub Konka <kubkon@jakubkonka.com>2020-11-18 10:12:39 +0100
committerJakub Konka <kubkon@jakubkonka.com>2020-11-18 10:12:39 +0100
commit39336fd2e9b7e471c3971b10adb91b5fd647c946 (patch)
treef9b827f19eecbf42fdd857795fb5a936b524ccf2 /src/codegen
parent5ff8dd179e0ccb17f894d8d76a9079e3080653cd (diff)
downloadzig-39336fd2e9b7e471c3971b10adb91b5fd647c946.tar.gz
zig-39336fd2e9b7e471c3971b10adb91b5fd647c946.zip
stage2 aarch64: assert register is 64bits in PCrel
Thanks @joachimschmidt557 for pointing out this fix!
Diffstat (limited to 'src/codegen')
-rw-r--r--src/codegen/aarch64.zig1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/codegen/aarch64.zig b/src/codegen/aarch64.zig
index 256c3129dc..18fccb823e 100644
--- a/src/codegen/aarch64.zig
+++ b/src/codegen/aarch64.zig
@@ -417,6 +417,7 @@ pub const Instruction = union(enum) {
}
fn pcRelativeAddress(rd: Register, imm21: i21, op: u1) Instruction {
+ assert(rd.size() == 64);
const imm21_u = @bitCast(u21, imm21);
return Instruction{
.PCRelativeAddress = .{