From 39336fd2e9b7e471c3971b10adb91b5fd647c946 Mon Sep 17 00:00:00 2001 From: Jakub Konka Date: Wed, 18 Nov 2020 10:12:39 +0100 Subject: stage2 aarch64: assert register is 64bits in PCrel Thanks @joachimschmidt557 for pointing out this fix! --- src/codegen/aarch64.zig | 1 + 1 file changed, 1 insertion(+) (limited to 'src/codegen') diff --git a/src/codegen/aarch64.zig b/src/codegen/aarch64.zig index 256c3129dc..18fccb823e 100644 --- a/src/codegen/aarch64.zig +++ b/src/codegen/aarch64.zig @@ -417,6 +417,7 @@ pub const Instruction = union(enum) { } fn pcRelativeAddress(rd: Register, imm21: i21, op: u1) Instruction { + assert(rd.size() == 64); const imm21_u = @bitCast(u21, imm21); return Instruction{ .PCRelativeAddress = .{ -- cgit v1.2.3