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AgeCommit message (Expand)Author
2021-09-28sat-arithmetic: fixups zig fmt / astcheckTravis Staloch
2021-09-28sat-arithmetic: add c backend supportTravis Staloch
2021-09-28sat-arithmetic: add operator supportTravis Staloch
2021-09-28stage2: more arithmetic supportAndrew Kelley
2021-09-27stage2: implement union coercion to its own tagAndrew Kelley
2021-09-27stage2: implement basic unionsAndrew Kelley
2021-09-24stage2: implement `@memset` and `@memcpy` builtinsAndrew Kelley
2021-09-24stage2 codegen: move bit definitions to src/archjoachimschmidt557
2021-09-24Spelling corrections (#9833)Josh Soref
2021-09-24stage2: enable building freestanding libc with LLVM backendAndrew Kelley
2021-09-23stage2: LLVM backend: improved naming and exportingAndrew Kelley
2021-09-23stage2: prepare for building freestanding libcAndrew Kelley
2021-09-22stage2: fix AstGen for some struct syntaxesAndrew Kelley
2021-09-21stage2: progress towards ability to compile compiler-rtAndrew Kelley
2021-09-21stage2: fix unsigned integer to signed integer coercionAndrew Kelley
2021-09-21stage2: free Sema's arena after generating machine codeAndrew Kelley
2021-09-20Merge branch 'address-space' of Snektron/zig into Snektron-address-spaceAndrew Kelley
2021-09-20stage2: improve handling of 0 bit typesAndrew Kelley
2021-09-20stage2: implement comptime `@atomicRmw`Andrew Kelley
2021-09-20Address Spaces: Yeet address space on function prototypesRobin Voetter
2021-09-20Address Spaces: Restructure llvmAddressSpace a bitRobin Voetter
2021-09-20Address Spaces: Implement in LLVM codegenRobin Voetter
2021-09-20Address Spaces: Chaining testsRobin Voetter
2021-09-19Update all ensureCapacity calls to the relevant non-deprecated versionRyan Liptak
2021-09-16stage2: improve LLVM backend for enumsAndrew Kelley
2021-09-16stage2: implement `@setAlignStack` and 128-bit cmpxchgAndrew Kelley
2021-09-15stage2: fix "cmpxchg with ptr" test caseAndrew Kelley
2021-09-15stage2: implement `@atomicRmw` and `@atomicLoad`Andrew Kelley
2021-09-15stage2: implement `@fence`Andrew Kelley
2021-09-14stage2: implement cmpxchg and improve comptime evalAndrew Kelley
2021-09-13stage2: add array_to_slice AIR instructionAndrew Kelley
2021-09-01stage2: update for new usingnamespace semanticsAndrew Kelley
2021-09-01stage2: first pass at implementing usingnamespaceAndrew Kelley
2021-08-31Merge pull request #9655 from nektro/stage2-remAndrew Kelley
2021-08-31Merge pull request #9603 from g-w1/arrcatAndrew Kelley
2021-08-31stage2 ARM: add missing parameters for bic, bicsjoachimschmidt557
2021-08-31stage2: only initialize the llvm backend for the target we are building (#9659)Meghan
2021-08-31stage2 llvm backend: if an array has a senteniel, add itJacob G-W
2021-08-30stage2: implement runtime `%` and `@rem`Meghan Denny
2021-08-26stage2 ARM: Add qadd, qsub, qdadd, qdsub instructionsjoachimschmidt557
2021-08-21stage2 Air: add struct_field_ptr_index_{0..3}Jacob G-W
2021-08-21stage2: comptime function with the same args is memoizedAndrew Kelley
2021-08-20Merge pull request #9597 from joachimschmidt557/stage2-arm-bitshiftAndrew Kelley
2021-08-20stage2: field type expressions support referencing localsAndrew Kelley
2021-08-20stage2 ARM: add lsl, lsr, asr, ror psuedo-instructionsjoachimschmidt557
2021-08-19stage2: implement shlJacob G-W
2021-08-19stage2: implement shr and boilerplate for shlJacob G-W
2021-08-12stage2 llvm backend: implement const inttoptrAndrew Kelley
2021-08-07stage2: pass some error union testsAndrew Kelley
2021-08-07stage2: pass some pointer testsAndrew Kelley
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