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path: root/src/arch/sparc64/Mir.zig
AgeCommit message (Expand)Author
2022-06-24stage2: sparc64: Implement airRem, airMod, and SPARCv9 s/udivxKoakuma
2022-06-24stage2: sparc64: Implement SPARCv9 shiftsKoakuma
2022-06-24stage2: sparc64: Implement airFence + SPARCv9 membarKoakuma
2022-06-24stage2: sparc64: Implement airBinOp for and, or, and xorKoakuma
2022-06-24stage2: sparc64: Use official encoding for `not rs2, rs1`Koakuma
2022-06-24stage2: sparc64: Introduce condition_register MCValue typeKoakuma
2022-06-06stage2: sparc64: Implement airNotKoakuma
2022-06-06stage2: sparc64: Implement airAddSubOverflowKoakuma
2022-06-06stage2: sparc64: Implement condition code spillingKoakuma
2022-05-26stage2: sparc64: Add cmp and mov synthetic instructionsKoakuma
2022-05-16stage2: sparc64: Implement airSliceElemValKoakuma
2022-05-16stage2: sparc64: Implement airCmpKoakuma
2022-05-16stage2: sparc64: Implement SPARCv9 bprKoakuma
2022-05-16stage2: sparc64: Split the conditionals between integer and FP onesKoakuma
2022-05-16stage2: sparc64: Implement airIsErr and airIsNonErrKoakuma
2022-05-13target: Rename sparcv9 -> sparc64Koakuma
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