zig - General-purpose programming language and toolchain for maintaining robust, optimal, and reusable software. https://ziglang.org

Age	Commit message (Expand)	Author
2025-09-26	compiler: move self-hosted backends from src/arch to src/codegen	Alex Rønne Petersen
2025-07-07	std.io.Writer.printValue: rework logic	Andrew Kelley
2025-07-07	std.fmt: fully remove format string from format methods	Andrew Kelley
2025-07-07	compiler: update a bunch of format strings	Andrew Kelley
2025-06-05	std.Target: Introduce Cpu convenience functions for feature tests.	Alex Rønne Petersen
2024-08-28	std: update `std.builtin.Type` fields to follow naming conventions	mlugg
2024-08-16	Dwarf: rework self-hosted debug info from scratch	Jacob Young
2024-07-26	riscv: implement basic tlv loads and stores	David Rubin
2024-07-26	riscv: clean up and unify encoding logic	David Rubin
2024-07-26	riscv: boilerplate for creating lazy functions	David Rubin
2024-07-14	riscv: vectors part 3	David Rubin
2024-07-14	riscv: vectors part 1	David Rubin
2024-06-23	riscv: remove deprecated `Module` usages	David Rubin
2024-06-22	rename src/Module.zig to src/Zcu.zig	Andrew Kelley
2024-06-13	riscv: rewrite "binOp"	David Rubin
2024-06-13	riscv: implement optional logic	David Rubin
2024-06-13	riscv: zero registers when using register-wide operations	David Rubin
2024-06-13	riscv: float args	David Rubin
2024-06-13	riscv: first sign of floats!	David Rubin
2024-06-13	riscv: `std.fmt.format` running	David Rubin
2024-06-13	riscv: arbitrary sized arrays	David Rubin
2024-05-11	riscv: mutable globals	David Rubin
2024-05-11	riscv: back to hello world panics	David Rubin
2024-05-11	riscv: big rewrite to use latest liveness	David Rubin
2024-05-11	riscv: add enough components to get a test runner working	David Rubin
2024-05-11	riscv: totally rewrite how we do loads and stores	David Rubin
2024-05-11	riscv: implement `@abs`	David Rubin
2023-06-24	all: migrate code to new cast builtin syntax	mlugg
2023-06-19	all: zig fmt and rename "@XToY" to "@YFromX"	Eric Joldasov
2023-03-04	add @trap builtin	r00ster91
2022-03-11	stage2 regalloc: replace Register.allocIndex with generic indexOfReg	joachimschmidt557
2022-01-30	stage2 RISCV64: Merge Register and RawRegister enums	joachimschmidt557
2021-09-24	stage2 codegen: move bit definitions to src/arch	joachimschmidt557