| Age | Commit message (Expand) | Author |
|---|---|---|
| 2022-04-01 | stage2 ARM: implement mul_with_overflow for ints <= 16 bits | joachimschmidt557 |
| 2022-03-11 | stage2 regalloc: replace Register.allocIndex with generic indexOfReg | joachimschmidt557 |
| 2022-02-27 | stage2 ARM: reduce Mir.Inst.Data to 8 bytes | joachimschmidt557 |
| 2022-02-26 | stage2 ARM: generate correct variants of ldr instruction | joachimschmidt557 |
| 2022-02-26 | stage2 ARM: implement truncate to ints with bits <= 32 | joachimschmidt557 |
| 2022-02-04 | stage2 ARM: optimize airSliceElemVal for elem_size 1 or 4 | joachimschmidt557 |
| 2021-09-24 | stage2 codegen: move bit definitions to src/arch | joachimschmidt557 |
