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AgeCommit message (Expand)Author
2022-02-14stage2 AArch64: implement is_err/is_non_err for simple error unionsjoachimschmidt557
2022-02-11macho: correctly lower slices incl reloc and rebase trackingJakub Konka
2022-02-09stage2: implement all builtin floatops for f{16,32,64}John Schmidt
2022-02-07stage2: implement @sqrt for f{16,32,64}John Schmidt
2022-02-07Merge pull request #10803 from ziglang/decl-has-lib-nameAndrew Kelley
2022-02-06stage2: add new Decl subtype, ExternFnJakub Konka
2022-02-06stage2 regalloc: Introduce error.OutOfRegistersjoachimschmidt557
2022-02-03stage2: remove the concept of register exceptionsJakub Konka
2022-01-30stage2 AArch64: Move to new regalloc freeze APIjoachimschmidt557
2022-01-30stage2: implement shl_exact and shr_exactAndrew Kelley
2022-01-24stage2: rework a lot of stuffAndrew Kelley
2022-01-18stage2: implement `@prefetch`Andrew Kelley
2022-01-18Revert "stage2: implement `@prefetch`"Andrew Kelley
2022-01-15stage2: implement `@prefetch`Andrew Kelley
2022-01-14stage2 AArch64: split ldr/str into {ldr,str}_register and _immediatejoachimschmidt557
2022-01-13stage2: fix build on 32-bit ISAsAndrew Kelley
2022-01-12stage2: implement `@ctz` and `@clz` including SIMDAndrew Kelley
2022-01-09stage2 codegen: fix airBlock bug in 3 backendsjoachimschmidt557
2022-01-08stage2: @errorName sema+llvmRobin Voetter
2021-12-27stage2: LLVM backend: implement `@tagName` for enumsAndrew Kelley
2021-12-21stage2: @shlWithOverflowRobin Voetter
2021-12-21stage2: @subWithOverflowRobin Voetter
2021-12-21stage2: @mulWithOverflowRobin Voetter
2021-12-21stage2: @returnAddress()Robin Voetter
2021-12-21stage2: @addWithOverflowRobin Voetter
2021-12-19stage2 AArch64: Implement saving callee-saved registersjoachimschmidt557
2021-11-30allocgate: std Allocator interface refactorLee Cannon
2021-11-30std lib API deprecations for the upcoming 0.9.0 releaseAndrew Kelley
2021-11-12stage2 AArch64: add new load/store from/to stack MIR instructionsjoachimschmidt557
2021-11-12stage2 AArch64: split Instruction.ldr into ldr and ldrLiteraljoachimschmidt557
2021-11-10stage2 AArch64: implement airCondBrjoachimschmidt557
2021-11-10stage2 AArch64: implement genSetReg for condition flagsjoachimschmidt557
2021-11-10stage2 AArch64: implement airCmpjoachimschmidt557
2021-11-10macho: use start.zig for macOS entrypointJakub Konka
2021-11-09Sema: implement coerce_result_ptr for optionalsAndrew Kelley
2021-11-01stage2 AArch64: implement unconditional branchesjoachimschmidt557
2021-10-31stage2 AArch64: introduce Emit.fail for handling errors in MIR emitjoachimschmidt557
2021-10-31stage2 AArch64: implement emit debug line infojoachimschmidt557
2021-10-31stage2 AArch64 Emit: implement call_extern and load_memoryjoachimschmidt557
2021-10-31stage2 AArch64: begin transition to MIRjoachimschmidt557
2021-10-29stage2: implement `@popCount` for non-vectorsAndrew Kelley
2021-10-22stage2: slice and alignment fixesAndrew Kelley
2021-10-21stage2: more division supportAndrew Kelley
2021-10-21stage2: elemPtr for slicesRobin Voetter
2021-10-21stage2: remove ptr_ptr_elem_val and ptr_slice_elem_valRobin Voetter
2021-10-20stage2: implement slicingAndrew Kelley
2021-10-20stage2: air ptr_slice_len_ptr and ptr_slice_ptr_ptrRobin Voetter
2021-10-15stage2 AArch64: move codegen to separate filejoachimschmidt557
2021-09-24stage2 codegen: move bit definitions to src/archjoachimschmidt557
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