| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2020-09-21 | rename src-self-hosted/ to src/ | Andrew Kelley | |
| 2020-08-11 | stage2: basic support for parameters .debug_info | Andrew Kelley | |
| see #6014 | |||
| 2020-07-29 | stage2: register-aliasing-aware codegen | Andrew Kelley | |
| * unify duplicated register allocation codepath * support the x86_64 concept of register aliasing * slightly improved memset codegen, supports sizes 1, 2, 4, 8 | |||
| 2020-07-27 | stage2: implement integer return values | Andrew Kelley | |
| 2020-07-20 | stage2: implement register copying | Andrew Kelley | |
| 2020-07-20 | stage2: codegen: refactor to always have comptime arch | Andrew Kelley | |
| 2020-06-28 | zig fmt and delete unused type | Andrew Kelley | |
| 2020-06-28 | stage2: implement function parameters | Andrew Kelley | |
| In codegen.zig, the std.Target.Cpu.Arch is now generally available as a comptime value where needed. This is a tradeoff that causes the compiler binary to be more bloated, but gives us higher performance, since the optimizer can optimize per architecture (which is usually how compilers are designed anyway, with different code per-architecture), and it also allows us to use per-architecture types, such as a Register enum that is specific to the comptime-known architecture. Adds abiSize method to Type. | |||
| 2020-06-08 | [Stage2/x86] Fix 8-bit register order | Noam Preil | |
| 2020-05-22 | [Stage2/Codegen] Typo fix | Noam Preil | |
| 2020-05-22 | [Stage2/Codegen] Document x64 register enum layout | Noam Preil | |
| 2020-05-17 | move some files around | Andrew Kelley | |
