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Age	Commit message (Expand)	Author
2020-03-03	Merge remote-tracking branch 'origin/master' into llvm10	Andrew Kelley
2020-02-26	arm baseline CPU is v7a rather than v6m	Andrew Kelley
2020-02-25	Merge remote-tracking branch 'origin/master' into llvm10	Andrew Kelley
2020-02-21	update ARM cpu models to correctly include the sub-arch	Andrew Kelley
2020-02-20	arm: clarify which CPU features are sub-architectures	Andrew Kelley
2020-02-20	Revert "arm: clean up the messy sub-architecture & CPU features"	Andrew Kelley
2020-02-19	remove the concept of "sub-architecture"	Andrew Kelley
2020-02-19	arm: clean up the messy sub-architecture & CPU features	Andrew Kelley
2020-02-19	clean up arm CPU features	Andrew Kelley
2020-02-17	enable behavior and std lib tests for RISC-V 64-bit	Andrew Kelley
2020-02-14	Merge remote-tracking branch 'origin/master' into llvm10	Andrew Kelley
2020-02-11	riscv: Remove 'relax' from the baseline cpu features	LemonBoy
2020-02-04	re-apply: these are not real CPU features	Andrew Kelley
2020-01-30	set llvm cpu features to null for exynosm1,exynosm2	Andrew Kelley
2020-01-30	update target CPUs and features with llvm10's data	Andrew Kelley
2020-01-23	fix incorrect list of sub-arches for aarch64	Andrew Kelley
2020-01-23	use an older arm64 sub-arch for test suite	Andrew Kelley
2020-01-22	aarch64: less feature-full baseline CPU	Andrew Kelley
2020-01-22	std.Target.CpuFeatures is now a struct with both CPU and feature set	Andrew Kelley
2020-01-21	lazily compute the full cpu features dependencies	Andrew Kelley
2020-01-21	hit a comptime limitation with computing dense sets	Andrew Kelley
2020-01-21	these are not real cpu features	Andrew Kelley
2020-01-21	fixups to arch data, support any number of cpu features	Andrew Kelley
2020-01-20	Revert "aarch64: remove CPU features that are actually just CPUs"	Andrew Kelley
2020-01-20	uncomment all the archs in target.zig	Andrew Kelley
2020-01-20	aarch64: remove CPU features that are actually just CPUs	Andrew Kelley
2020-01-20	import data from llvm 9	Andrew Kelley
2020-01-20	stage1 is building. `zig targets` now self-hosted	Andrew Kelley
2020-01-19	do the x86 arch	Andrew Kelley
2020-01-19	progress towards merging	Andrew Kelley
2020-01-19	Remove features/cpus not in LLVM v9	Layne Gustafson
2020-01-19	Add builtin.zig support	Layne Gustafson
2020-01-19	Add llvm_name to feature defs	Layne Gustafson
2020-01-19	Rename subfeatures -> dependencies	Layne Gustafson
2020-01-19	Filter out non-features	Layne Gustafson
2020-01-19	Remove llvm_name from features	Layne Gustafson
2020-01-19	Switch CPU/features to simple format	Layne Gustafson
2020-01-19	Fix CPU and feature defs	Layne Gustafson
2020-01-19	Update term feature deps -> subfeatures	Layne Gustafson
2020-01-19	Create initial target details infrastructure	Layne Gustafson