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release/17.x branch, commit 8f4dd44097c9ae25dd203d5ac87f3b48f854bba8
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Signed-off-by: Eric Joldasov <bratishkaerik@getgoogleoff.me>
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Notable changes:
`_i386`, `_i486`, and `_i686` are renamed to `i386`, `i486`,
and `i686` respectively. `std.zig.fmtId` is enhanced to support
formatting `i386` as `@"i386"`.
Some CPU features which are actually CPU models have been
properly flattened, such as `apple_a12`, `apple_a13`, `apple_a7`,
`cortex_a78c`, `exynos_m4`, `neoverse_e1`, `neoverse_n1`,
`neoverse_n2`, `neoverse_v1`.
Some CPU features have been added and some have been removed, following
LLVM's lead.
CSky CPU features support is added.
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The idea is to depend on this language feature as little as possible
with the hopes that it can be adjusted to be less of an anti-pattern.
This also helps self-hosted, which does not yet implement
`usingnamespace`, get closer to being able to build compiler-rt.
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With this change, added & modified cpus & features participate in the
same pruning system, and sorting takes into account the zig name, not
the pre-modified llvm name.
The modified target files in this commit are due to the improved
sorting and pruning.
The script now fully supports extra cpus & features.
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Conflicts:
* src/clang.zig
* src/llvm.zig
- this file got moved to src/llvm/bindings.zig in master branch so I
had to put the new LLVM arch/os enum tags into it.
* lib/std/target.zig, src/stage1/target.cpp
- haiku had an inconsistency with its default target ABI, gnu vs
eabi. In this commit we make it gnu in both places to match the
latest changes by @hoanga.
* src/translate_c.zig
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Rather than directly pasting the output from the
target-details-generator tool, we have to look at the diff line by line
and decide how to incorporate the changes.
The baseline abstraction is something that Zig provides.
The changes to x86 appear to be incorrect. After LLVM commit
3ad09fd03c51823aeb0bcbd7898aada33e9228d6 the CPU features are stored in
a different data layout in their tables, and so we need to update the
target details extraction tool to match.
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llvm commit b2851aea80e5a8f0cfd6c3c5a56a6b00fb28c6b6
zig-llvm-target-details-generator commit
4299674ecabeb668b0d84285cd1b41a652a391b1
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add SPDX license identifier
copyright ownership is zig contributors
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in favor of CPU features. Also rearrange the `std.Target`
data structure.
* note: `@import("builtin")` was already deprecated in favor of
`@import("std").builtin`.
* `std.builtin.arch` is now deprecated in favor of
`std.builtin.cpu.arch`.
* `std.Target.CpuFeatures.Cpu` is now `std.Target.Cpu.Model`.
* `std.Target.CpuFeatures` is now `std.Target.Cpu`.
* `std.Target` no longer has an `arch` field. Instead it has a
`cpu` field, which has `arch`, `model`, and `features`.
* `std.Target` no longer has a `cpu_features` field.
* `std.Target.Arch` is moved to `std.Target.Cpu.Arch` and
it is an enum instead of a tagged union.
* `std.Target.parseOs` is moved to `std.Target.Os.parse`.
* `std.Target.parseAbi` is moved to `std.Target.Abi.parse`.
* `std.Target.parseArchSub` is only for arch now and moved
to `std.Target.Cpu.Arch.parse`.
* `std.Target.parse` is improved to accept CPU name and features.
* `std.Target.Arch.getBaselineCpuFeatures` is moved to
`std.Target.Cpu.baseline`.
* `std.Target.allCpus` is renamed to `std.Target.allCpuModels`.
* `std.Target.defaultAbi` is moved to `std.Target.Abi.default`.
* Significant cleanup of aarch64 and arm CPU features, resulting in
the needed bit count for cpu feature set going from 174 to 138.
* Add `std.Target.Cpu.Feature.Set.addFeatureSet` for merging
feature sets together.
`-target-feature` and `-target-cpu` are removed in favor of
`-mcpu`, to conform to established conventions, and it gains
additional power to support cpu features. The syntax is:
-mcpu=name+on1+on2-off1-off2
closes #4261
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closes #3338
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LLD doesn't implement relaxations at the moment.
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based on zig-llvm-target-details-generator
commit 3aef1b9b4415ed3acfaea4ce8bc233e213548f71
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Previously it was a tagged union which was one of:
* baseline
* a specific CPU
* a set of features
Now, it's possible to have a CPU but also modify the CPU's feature set
on top of that. This is closer to what LLVM does.
This is more correct because Zig's notion of CPUs (and LLVM's) is not
exact CPU models. For example "skylake" is not one very specific model;
there are several different pieces of hardware that match "skylake" that
have different feature sets enabled.
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