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path: root/lib/std/start.zig
AgeCommit message (Expand)Author
2024-08-01Merge pull request #20797 from alexrp/start-more-archesAndrew Kelley
2024-08-01Merge pull request #20857 from alexrp/tls-portingAndrew Kelley
2024-08-01Merge pull request #20872 from alexrp/riscv-gpAndrew Kelley
2024-07-31start: remove riscv conditionDavid Rubin
2024-07-31start: Disable the gp initialization code for the self-hosted riscv64 backend.Alex Rønne Petersen
2024-07-31start: Initialize gp to __global_pointer$ on riscv.Alex Rønne Petersen
2024-07-30start: Copy the mips64 comment about gp to the mips32 code.Alex Rønne Petersen
2024-07-30start: Add POSIX csky support.Alex Rønne Petersen
2024-07-29Merge pull request #20852 from ziglang/init-array-start-codeAndrew Kelley
2024-07-30std.os.linux.tls: Refactor and improve documentation.Alex Rønne Petersen
2024-07-29Merge pull request #20389 from alexrp/riscv32Andrew Kelley
2024-07-29Merge pull request #20822 from alexrp/start-mips-fixesAndrew Kelley
2024-07-29disable the new code for self-hosted riscv backendAndrew Kelley
2024-07-29start: Always inline the call to std.os.linux.pie.relocate().Alex Rønne Petersen
2024-07-29start: Set std.os.linux.elf_aux_maybe after PIE relocations.Alex Rønne Petersen
2024-07-29start: Perform the posixCallMainAndExit() call with jalr on mips.Alex Rønne Petersen
2024-07-29start: Set up the gp register on mips and mips64.Alex Rønne Petersen
2024-07-29start: Implement _start() for riscv32.Alex Rønne Petersen
2024-07-28start code: implement __init_array_start, __init_array_endAndrew Kelley
2024-07-26riscv: implement `lr/sr` loop logic for non-native atomicsDavid Rubin
2024-07-26riscv: airAsm rewriteDavid Rubin
2024-07-26start: Add POSIX arc support.Alex Rønne Petersen
2024-07-26start: Add POSIX hexagon support.Alex Rønne Petersen
2024-07-25start: Align the stack on sparc64 just in case.Alex Rønne Petersen
2024-07-25start: Fix mips stack alignment value (should be 8, not 16).Alex Rønne Petersen
2024-07-25start: Simplify mips and mips64 startup code.Alex Rønne Petersen
2024-07-24start: Explicitly clear the link register on mips and mips64 just in case.Alex Rønne Petersen
2024-07-24start: Properly escape percent signs in the s390x inline asm.Alex Rønne Petersen
2024-07-24start: Align the stack on s390x just in case.Alex Rønne Petersen
2024-07-24start: Align the stack on powerpc just in case.Alex Rønne Petersen
2024-07-24start: Align the stack on aarch64 just in case.Alex Rønne Petersen
2024-07-24start: Simplify the sparc64 inline asm a bit.Alex Rønne Petersen
2024-07-24start: Add a comment explaining the sparc64 stack bias.Alex Rønne Petersen
2024-07-24start: Add a comment explaining our paranoid stance on ABI guarantees.Alex Rønne Petersen
2024-07-24start: Handle loongarch32 together with loongarch64.Alex Rønne Petersen
2024-07-23Merge pull request #20706 from alexrp/sigaction-nosysAndrew Kelley
2024-07-23Merge pull request #20725 from ziglang/fuzzAndrew Kelley
2024-07-22update start code to use `@disableInstrumentation`Andrew Kelley
2024-07-22start: Add POSIX s390x startup code.Alex Rønne Petersen
2024-07-22start: Add POSIX loongarch64 startup code.Alex Rønne Petersen
2024-07-22start: Add POSIX m68k startup code.Alex Rønne Petersen
2024-07-22start: Pass _start() into its own inline asm as an operand.Alex Rønne Petersen
2024-07-22start: Add clrrdi to align the stack pointer on powerpc64.Alex Rønne Petersen
2024-07-22start: Fix _start() to initialize the ToC for powerpc64.Alex Rønne Petersen
2024-07-21start: Avoid going through the argc_argv_ptr global variable.Alex Rønne Petersen
2024-07-21std.posix: Consider invalid signal numbers to sigaction() to be programmer er...Alex Rønne Petersen
2024-07-17Merge pull request #20474 from Rexicon226/riscvJakub Konka
2024-07-15start: refactor callMain return type checkinggooncreeper
2024-07-14riscv: vectors part 3David Rubin
2024-06-16Revert "start: workaround for LLVM 17 regression"Alex Rønne Petersen
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