aboutsummaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
Diffstat (limited to 'src')
-rw-r--r--src/arch/x86_64/CodeGen.zig7
-rw-r--r--src/arch/x86_64/abi.zig2
-rw-r--r--src/link/Coff.zig2
3 files changed, 8 insertions, 3 deletions
diff --git a/src/arch/x86_64/CodeGen.zig b/src/arch/x86_64/CodeGen.zig
index 1805fe7697..6c2db1f25e 100644
--- a/src/arch/x86_64/CodeGen.zig
+++ b/src/arch/x86_64/CodeGen.zig
@@ -4204,6 +4204,7 @@ fn airRet(self: *Self, inst: Air.Inst.Index) !void {
},
.stack_offset => {
const reg = try self.copyToTmpRegister(Type.usize, self.ret_mcv);
+ log.warn("REG = {}", .{reg});
const reg_lock = self.register_manager.lockRegAssumeUnused(reg);
defer self.register_manager.unlockReg(reg_lock);
@@ -5854,7 +5855,11 @@ fn genInlineMemcpy(
len: MCValue,
opts: InlineMemcpyOpts,
) InnerError!void {
- // TODO preserve contents of .rax and .rcx if not free, and then restore
+ // TODO: Preserve contents of .rax and .rcx if not free and locked, and then restore
+ // How can we do this without context if the value inside .rax or .rcx we preserve contains
+ // value needed to perform the memcpy in the first place?
+ // I think we should have an accumulator-based context that we pass with each subsequent helper
+ // call until we resolve the entire instruction.
try self.register_manager.getReg(.rax, null);
try self.register_manager.getReg(.rcx, null);
diff --git a/src/arch/x86_64/abi.zig b/src/arch/x86_64/abi.zig
index 2f4a7d1681..298fc6656f 100644
--- a/src/arch/x86_64/abi.zig
+++ b/src/arch/x86_64/abi.zig
@@ -447,7 +447,7 @@ pub fn getCAbiIntReturnRegs(target: Target) []const Register {
}
const gp_regs = [_]Register{
- .rax, .rbx, .rcx, .rdx, .rsi, .rdi, .r8, .r9, .r10, .r11, .r12, .r13, .r14, .r15,
+ .rbx, .r12, .r13, .r14, .r15, .rax, .rcx, .rdx, .rsi, .rdi, .r8, .r9, .r10, .r11,
};
const sse_avx_regs = [_]Register{
.ymm0, .ymm1, .ymm2, .ymm3, .ymm4, .ymm5, .ymm6, .ymm7,
diff --git a/src/link/Coff.zig b/src/link/Coff.zig
index 05ccfb7710..b5670ce5a1 100644
--- a/src/link/Coff.zig
+++ b/src/link/Coff.zig
@@ -1053,7 +1053,7 @@ pub fn updateDecl(self: *Coff, module: *Module, decl_index: Module.Decl.Index) !
.ty = decl.ty,
.val = decl_val,
}, &code_buffer, .none, .{
- .parent_atom_index = 0,
+ .parent_atom_index = decl.link.coff.sym_index,
});
const code = switch (res) {
.externally_managed => |x| x,