1 files changed, 5 insertions, 6 deletions
diff --git a/src/stage1/all_types.hpp b/src/stage1/all_types.hpp
index 9161a46569..32550132e6 100644
--- a/src/stage1/all_types.hpp
+++ b/src/stage1/all_types.hpp
@@ -2475,7 +2475,7 @@ struct IrBasicBlockGen {
 // Src instructions are generated by ir_gen_* functions in ir.cpp from AST.
 // ir_analyze_* functions consume Src instructions and produce Gen instructions.
 // Src instructions do not have type information; Gen instructions do.
-enum IrInstSrcId {
+enum IrInstSrcId : uint8_t {
     IrInstSrcIdInvalid,
     IrInstSrcIdDeclVar,
     IrInstSrcIdBr,
@@ -2620,7 +2620,7 @@ enum IrInstSrcId {
 
 // ir_render_* functions in codegen.cpp consume Gen instructions and produce LLVM IR.
 // Src instructions do not have type information; Gen instructions do.
-enum IrInstGenId {
+enum IrInstGenId : uint8_t {
     IrInstGenIdInvalid,
     IrInstGenIdDeclVar,
     IrInstGenIdBr,
@@ -2714,14 +2714,13 @@ enum IrInstGenId {
 };
 
 struct IrInstSrc {
-    uint32_t ref_count;
+    IrInstSrcId id;
+    uint16_t ref_count;
     uint32_t debug_id;
 
     Scope *scope;
     AstNode *source_node;
 
-    IrInstSrcId id;
-
     // When analyzing IR, instructions that point to this instruction in the "old ir"
     // can find the instruction that corresponds to this value in the "new ir"
     // with this child field.
@@ -2737,7 +2736,7 @@ struct IrInstGen {
     IrInstGenId id;
     // if ref_count is zero and the instruction has no side effects,
     // the instruction can be omitted in codegen
-    uint32_t ref_count;
+    uint16_t ref_count;
     uint32_t debug_id;
 
     Scope *scope;