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-rw-r--r--src/codegen/c.zig2
-rw-r--r--src/codegen/llvm.zig6
2 files changed, 4 insertions, 4 deletions
diff --git a/src/codegen/c.zig b/src/codegen/c.zig
index 4d55637f27..41ec422959 100644
--- a/src/codegen/c.zig
+++ b/src/codegen/c.zig
@@ -5190,7 +5190,7 @@ fn asmInputNeedsLocal(f: *Function, constraint: []const u8, value: CValue) bool
return switch (constraint[0]) {
'{' => true,
'i', 'r' => false,
- 'I' => !target.cpu.arch.isArmOrThumb(),
+ 'I' => !target.cpu.arch.isArm(),
else => switch (value) {
.constant => |val| switch (dg.pt.zcu.intern_pool.indexToKey(val.toIntern())) {
.ptr => |ptr| if (ptr.byte_offset == 0) switch (ptr.base_addr) {
diff --git a/src/codegen/llvm.zig b/src/codegen/llvm.zig
index fc7d26a815..85a4062ed3 100644
--- a/src/codegen/llvm.zig
+++ b/src/codegen/llvm.zig
@@ -494,7 +494,7 @@ const DataLayoutBuilder = struct {
if (idx != size) try writer.print(":{d}", .{idx});
}
}
- if (self.target.cpu.arch.isArmOrThumb())
+ if (self.target.cpu.arch.isArm())
try writer.writeAll("-Fi8") // for thumb interwork
else if (self.target.cpu.arch == .powerpc64 and
self.target.os.tag != .freebsd and
@@ -761,7 +761,7 @@ const DataLayoutBuilder = struct {
else => {},
}
},
- .vector => if (self.target.cpu.arch.isArmOrThumb()) {
+ .vector => if (self.target.cpu.arch.isArm()) {
switch (size) {
128 => abi = 64,
else => {},
@@ -827,7 +827,7 @@ const DataLayoutBuilder = struct {
else => {},
},
.aggregate => if (self.target.os.tag == .uefi or self.target.os.tag == .windows or
- self.target.cpu.arch.isArmOrThumb())
+ self.target.cpu.arch.isArm())
{
pref = @min(pref, self.target.ptrBitWidth());
} else switch (self.target.cpu.arch) {