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-rw-r--r--src/arch/aarch64/CodeGen.zig4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/arch/aarch64/CodeGen.zig b/src/arch/aarch64/CodeGen.zig
index 3a70144407..a85ca21016 100644
--- a/src/arch/aarch64/CodeGen.zig
+++ b/src/arch/aarch64/CodeGen.zig
@@ -3982,6 +3982,7 @@ fn store(self: *Self, ptr: MCValue, value: MCValue, ptr_ty: Type, value_ty: Type
.got => .load_memory_ptr_got,
.direct => .load_memory_ptr_direct,
.import => unreachable,
+ .tlv => @panic("TODO TLV support"),
};
const atom_index = switch (self.bin_file.tag) {
.macho => blk: {
@@ -5510,6 +5511,7 @@ fn genSetStack(self: *Self, ty: Type, stack_offset: u32, mcv: MCValue) InnerErro
.got => .load_memory_ptr_got,
.direct => .load_memory_ptr_direct,
.import => unreachable,
+ .tlv => @panic("TODO TLV support"),
};
const atom_index = switch (self.bin_file.tag) {
.macho => blk: {
@@ -5630,6 +5632,7 @@ fn genSetReg(self: *Self, ty: Type, reg: Register, mcv: MCValue) InnerError!void
.got => .load_memory_got,
.direct => .load_memory_direct,
.import => .load_memory_import,
+ .tlv => @panic("TODO TLV support"),
};
const atom_index = switch (self.bin_file.tag) {
.macho => blk: {
@@ -5830,6 +5833,7 @@ fn genSetStackArgument(self: *Self, ty: Type, stack_offset: u32, mcv: MCValue) I
.got => .load_memory_ptr_got,
.direct => .load_memory_ptr_direct,
.import => unreachable,
+ .tlv => @panic("TODO TLV support"),
};
const atom_index = switch (self.bin_file.tag) {
.macho => blk: {