aboutsummaryrefslogtreecommitdiff
path: root/lib/std
diff options
context:
space:
mode:
Diffstat (limited to 'lib/std')
-rw-r--r--lib/std/Target.zig60
-rw-r--r--lib/std/atomic.zig1
-rw-r--r--lib/std/builtin.zig2
-rw-r--r--lib/std/c.zig6
-rw-r--r--lib/std/os/linux.zig4
-rw-r--r--lib/std/os/linux/ioctl.zig1
6 files changed, 17 insertions, 57 deletions
diff --git a/lib/std/Target.zig b/lib/std/Target.zig
index 7c222a9b53..8d9f596072 100644
--- a/lib/std/Target.zig
+++ b/lib/std/Target.zig
@@ -17,8 +17,6 @@ pub const Os = struct {
pub const Tag = enum {
freestanding,
- ananas,
- cloudabi,
dragonfly,
freebsd,
fuchsia,
@@ -140,8 +138,6 @@ pub const Os = struct {
pub inline fn getVersionRangeTag(tag: Tag) @typeInfo(TaggedVersionRange).Union.tag_type.? {
return switch (tag) {
.freestanding,
- .ananas,
- .cloudabi,
.fuchsia,
.ps3,
.zos,
@@ -202,7 +198,7 @@ pub const Os = struct {
.mips, .mipsel, .mips64, .mips64el => "mips",
.powerpc, .powerpcle, .powerpc64, .powerpc64le => "powerpc",
.riscv32, .riscv64 => "riscv",
- .sparc, .sparcel, .sparc64 => "sparc",
+ .sparc, .sparc64 => "sparc",
.x86, .x86_64 => "x86",
else => @tagName(arch),
},
@@ -373,8 +369,6 @@ pub const Os = struct {
pub fn default(tag: Tag, arch: Cpu.Arch) VersionRange {
return switch (tag) {
.freestanding,
- .ananas,
- .cloudabi,
.fuchsia,
.ps3,
.zos,
@@ -560,8 +554,6 @@ pub const Os = struct {
.linux,
.windows,
.freestanding,
- .ananas,
- .cloudabi,
.fuchsia,
.ps3,
.zos,
@@ -667,8 +659,6 @@ pub const Abi = enum {
pub fn default(arch: Cpu.Arch, os: Os) Abi {
return if (arch.isWasm()) .musl else switch (os.tag) {
.freestanding,
- .ananas,
- .cloudabi,
.dragonfly,
.ps3,
.zos,
@@ -1018,7 +1008,6 @@ pub const Cpu = struct {
riscv64,
sparc,
sparc64,
- sparcel,
s390x,
thumb,
thumbeb,
@@ -1028,8 +1017,6 @@ pub const Cpu = struct {
xtensa,
nvptx,
nvptx64,
- spir,
- spir64,
spirv,
spirv32,
spirv64,
@@ -1043,12 +1030,17 @@ pub const Cpu = struct {
// LLVM tags deliberately omitted:
// - aarch64_32
// - r600
+ // - sparcel
+ // - tce
+ // - tcele
// - le32
// - le64
// - amdil
// - amdil64
// - hsail
// - hsail64
+ // - spir
+ // - spir64
// - shave
// - renderscript32
// - renderscript64
@@ -1122,7 +1114,7 @@ pub const Cpu = struct {
pub inline fn isSPARC(arch: Arch) bool {
return switch (arch) {
- .sparc, .sparcel, .sparc64 => true,
+ .sparc, .sparc64 => true,
else => false,
};
}
@@ -1172,14 +1164,12 @@ pub const Cpu = struct {
.powerpc, .powerpcle => .PPC,
.riscv32 => .RISCV,
.sparc => .SPARC,
- .sparcel => .SPARC,
.thumb => .ARM,
.thumbeb => .ARM,
.x86 => .@"386",
.xcore => .XCORE,
.xtensa => .XTENSA,
.nvptx => .NONE,
- .spir => .NONE,
.kalimba => .CSR_KALIMBA,
.lanai => .LANAI,
.wasm32 => .NONE,
@@ -1192,7 +1182,6 @@ pub const Cpu = struct {
.riscv64 => .RISCV,
.x86_64 => .X86_64,
.nvptx64 => .NONE,
- .spir64 => .NONE,
.wasm64 => .NONE,
.amdgcn => .AMDGPU,
.bpfel => .BPF,
@@ -1225,14 +1214,12 @@ pub const Cpu = struct {
.powerpc, .powerpcle => .POWERPC,
.riscv32 => .RISCV32,
.sparc => .Unknown,
- .sparcel => .Unknown,
.thumb => .Thumb,
.thumbeb => .Thumb,
.x86 => .I386,
.xcore => .Unknown,
.xtensa => .Unknown,
.nvptx => .Unknown,
- .spir => .Unknown,
.kalimba => .Unknown,
.lanai => .Unknown,
.wasm32 => .Unknown,
@@ -1245,7 +1232,6 @@ pub const Cpu = struct {
.riscv64 => .RISCV64,
.x86_64 => .X64,
.nvptx64 => .Unknown,
- .spir64 => .Unknown,
.wasm64 => .Unknown,
.amdgcn => .Unknown,
.bpfel => .Unknown,
@@ -1279,7 +1265,6 @@ pub const Cpu = struct {
.msp430,
.nvptx,
.nvptx64,
- .sparcel,
.powerpcle,
.powerpc64le,
.riscv32,
@@ -1290,8 +1275,6 @@ pub const Cpu = struct {
.wasm64,
.xcore,
.thumb,
- .spir,
- .spir64,
.ve,
.spu_2,
// GPU bitness is opaque. For now, assume little endian.
@@ -1348,7 +1331,7 @@ pub const Cpu = struct {
.powerpc, .powerpcle, .powerpc64, .powerpc64le => "powerpc",
.amdgcn => "amdgpu",
.riscv32, .riscv64 => "riscv",
- .sparc, .sparc64, .sparcel => "sparc",
+ .sparc, .sparc64 => "sparc",
.s390x => "s390x",
.x86, .x86_64 => "x86",
.nvptx, .nvptx64 => "nvptx",
@@ -1375,7 +1358,7 @@ pub const Cpu = struct {
.powerpc, .powerpcle, .powerpc64, .powerpc64le => &powerpc.all_features,
.amdgcn => &amdgpu.all_features,
.riscv32, .riscv64 => &riscv.all_features,
- .sparc, .sparc64, .sparcel => &sparc.all_features,
+ .sparc, .sparc64 => &sparc.all_features,
.spirv32, .spirv64 => &spirv.all_features,
.s390x => &s390x.all_features,
.x86, .x86_64 => &x86.all_features,
@@ -1405,7 +1388,7 @@ pub const Cpu = struct {
.powerpc, .powerpcle, .powerpc64, .powerpc64le => comptime allCpusFromDecls(powerpc.cpu),
.amdgcn => comptime allCpusFromDecls(amdgpu.cpu),
.riscv32, .riscv64 => comptime allCpusFromDecls(riscv.cpu),
- .sparc, .sparc64, .sparcel => comptime allCpusFromDecls(sparc.cpu),
+ .sparc, .sparc64 => comptime allCpusFromDecls(sparc.cpu),
.spirv32, .spirv64 => comptime allCpusFromDecls(spirv.cpu),
.s390x => comptime allCpusFromDecls(s390x.cpu),
.x86, .x86_64 => comptime allCpusFromDecls(x86.cpu),
@@ -1497,7 +1480,7 @@ pub const Cpu = struct {
.riscv32 => &riscv.cpu.generic_rv32,
.riscv64 => &riscv.cpu.generic_rv64,
.spirv32, .spirv64 => &spirv.cpu.generic,
- .sparc, .sparcel => &sparc.cpu.generic,
+ .sparc => &sparc.cpu.generic,
.sparc64 => &sparc.cpu.v9, // 64-bit SPARC needs v9 as the baseline
.s390x => &s390x.cpu.generic,
.x86 => &x86.cpu.i386,
@@ -1519,7 +1502,7 @@ pub const Cpu = struct {
.x86 => &x86.cpu.pentium4,
.nvptx, .nvptx64 => &nvptx.cpu.sm_20,
.s390x => &s390x.cpu.arch8,
- .sparc, .sparcel => &sparc.cpu.v8,
+ .sparc => &sparc.cpu.v8,
.loongarch64 => &loongarch.cpu.loongarch64,
else => generic(arch),
@@ -1704,7 +1687,6 @@ pub const DynamicLinker = struct {
.linux => switch (cpu.arch) {
.x86,
.sparc,
- .sparcel,
=> init("/lib/ld-linux.so.2"),
.aarch64 => init("/lib/ld-linux-aarch64.so.1"),
@@ -1773,8 +1755,6 @@ pub const DynamicLinker = struct {
.msp430,
.amdgcn,
.xcore,
- .spir,
- .spir64,
.kalimba,
.lanai,
.ve,
@@ -1811,8 +1791,6 @@ pub const DynamicLinker = struct {
// TODO go over each item in this list and either move it to the above list, or
// implement the standard dynamic linker path code for it.
- .ananas,
- .cloudabi,
.fuchsia,
.ps3,
.zos,
@@ -1865,13 +1843,11 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 {
.powerpc,
.powerpcle,
.riscv32,
- .sparcel,
.thumb,
.thumbeb,
.x86,
.xcore,
.nvptx,
- .spir,
.kalimba,
.lanai,
.wasm32,
@@ -1890,7 +1866,6 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 {
.riscv64,
.x86_64,
.nvptx64,
- .spir64,
.wasm64,
.amdgcn,
.bpfel,
@@ -1927,7 +1902,6 @@ pub fn stackAlignment(target: Target) u16 {
.mips,
.mipsel,
.sparc,
- .sparcel,
=> 8,
.aarch64,
.aarch64_be,
@@ -2088,7 +2062,6 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 {
.s390x,
.sparc,
.sparc64,
- .sparcel,
.wasm32,
.wasm64,
.loongarch32,
@@ -2111,7 +2084,6 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 {
.solaris,
.illumos,
.haiku,
- .ananas,
.fuchsia,
.minix,
=> switch (target.cpu.arch) {
@@ -2195,7 +2167,6 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 {
.mips64el,
.sparc,
.sparc64,
- .sparcel,
.wasm32,
.wasm64,
.loongarch32,
@@ -2307,7 +2278,6 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 {
.longdouble => return 80,
},
- .cloudabi,
.ps3,
.zos,
.rtems,
@@ -2375,7 +2345,6 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {
.xcore,
.dxil,
.loongarch32,
- .spir,
.spirv32,
.kalimba,
.ve,
@@ -2392,13 +2361,11 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {
.mips,
.mipsel,
.sparc,
- .sparcel,
.sparc64,
.lanai,
.nvptx,
.nvptx64,
.s390x,
- .spir64,
.spirv64,
=> 8,
@@ -2483,7 +2450,6 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {
.xcore,
.dxil,
.loongarch32,
- .spir,
.spirv32,
.kalimba,
.ve,
@@ -2507,13 +2473,11 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {
.mips,
.mipsel,
.sparc,
- .sparcel,
.sparc64,
.lanai,
.nvptx,
.nvptx64,
.s390x,
- .spir64,
.spirv64,
=> 8,
diff --git a/lib/std/atomic.zig b/lib/std/atomic.zig
index 084d44b3e6..0f25bd448a 100644
--- a/lib/std/atomic.zig
+++ b/lib/std/atomic.zig
@@ -478,7 +478,6 @@ pub const cache_line = switch (builtin.cpu.arch) {
.riscv32,
.riscv64,
.sparc,
- .sparcel,
.sparc64,
=> 32,
diff --git a/lib/std/builtin.zig b/lib/std/builtin.zig
index 86f8da6cd4..176b17dd07 100644
--- a/lib/std/builtin.zig
+++ b/lib/std/builtin.zig
@@ -615,7 +615,7 @@ pub const VaList = switch (builtin.cpu.arch) {
else => VaListPowerPc,
},
.powerpc64, .powerpc64le => *u8,
- .sparc, .sparcel, .sparc64 => *anyopaque,
+ .sparc, .sparc64 => *anyopaque,
.spirv32, .spirv64 => *anyopaque,
.s390x => VaListS390x,
.wasm32, .wasm64 => *anyopaque,
diff --git a/lib/std/c.zig b/lib/std/c.zig
index ff2c7dbd85..f6398720bf 100644
--- a/lib/std/c.zig
+++ b/lib/std/c.zig
@@ -5779,7 +5779,7 @@ pub const ucontext_t = switch (native_os) {
.x86 => 4,
.mips, .mipsel, .mips64, .mips64el => 14,
.arm, .armeb, .thumb, .thumbeb => 1,
- .sparc, .sparcel, .sparc64 => if (@sizeOf(usize) == 4) 43 else 8,
+ .sparc, .sparc64 => if (@sizeOf(usize) == 4) 43 else 8,
else => 0,
}
]u32,
@@ -6821,7 +6821,7 @@ pub const pthread_key_t = switch (native_os) {
pub const padded_pthread_spin_t = switch (native_os) {
.netbsd => switch (builtin.cpu.arch) {
.x86, .x86_64 => u32,
- .sparc, .sparcel, .sparc64 => u32,
+ .sparc, .sparc64 => u32,
else => pthread_spin_t,
},
else => void,
@@ -6834,7 +6834,7 @@ pub const pthread_spin_t = switch (native_os) {
.powerpc, .powerpc64, .powerpc64le => i32,
.x86, .x86_64 => u8,
.arm, .armeb, .thumb, .thumbeb => i32,
- .sparc, .sparcel, .sparc64 => u8,
+ .sparc, .sparc64 => u8,
.riscv32, .riscv64 => u32,
else => @compileError("undefined pthread_spin_t for this arch"),
},
diff --git a/lib/std/os/linux.zig b/lib/std/os/linux.zig
index 9a91b7f0f0..1ca8227781 100644
--- a/lib/std/os/linux.zig
+++ b/lib/std/os/linux.zig
@@ -2496,7 +2496,7 @@ pub const E = switch (native_arch) {
pub const init = errnoFromSyscall;
},
- .sparc, .sparcel, .sparc64 => enum(u16) {
+ .sparc, .sparc64 => enum(u16) {
/// No error occurred.
SUCCESS = 0,
@@ -4843,7 +4843,6 @@ pub const MINSIGSTKSZ = switch (native_arch) {
=> 2048,
.loongarch64,
.sparc,
- .sparcel,
.sparc64,
=> 4096,
.aarch64,
@@ -4880,7 +4879,6 @@ pub const SIGSTKSZ = switch (native_arch) {
.aarch64_be,
.loongarch64,
.sparc,
- .sparcel,
.sparc64,
=> 16384,
.powerpc64,
diff --git a/lib/std/os/linux/ioctl.zig b/lib/std/os/linux/ioctl.zig
index 7f5d36b72d..8b7cc80af9 100644
--- a/lib/std/os/linux/ioctl.zig
+++ b/lib/std/os/linux/ioctl.zig
@@ -11,7 +11,6 @@ const bits = switch (@import("builtin").cpu.arch) {
.powerpc64le,
.sparc,
.sparc64,
- .sparcel,
=> .{ .size = 13, .dir = 3, .none = 1, .read = 2, .write = 4 },
else => .{ .size = 14, .dir = 2, .none = 0, .read = 2, .write = 1 },
};
generated by cgit v1.2.3 (git 2.39.1) at 2025-12-28 07:49:13 +0000