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-rw-r--r--lib/std/start.zig18
1 files changed, 9 insertions, 9 deletions
diff --git a/lib/std/start.zig b/lib/std/start.zig
index 68ad3f67ac..0228ffdc2b 100644
--- a/lib/std/start.zig
+++ b/lib/std/start.zig
@@ -20,7 +20,6 @@ pub const simplified_logic =
builtin.zig_backend == .stage2_x86 or
builtin.zig_backend == .stage2_aarch64 or
builtin.zig_backend == .stage2_arm or
- builtin.zig_backend == .stage2_riscv64 or
builtin.zig_backend == .stage2_sparc64 or
builtin.cpu.arch == .spirv32 or
builtin.cpu.arch == .spirv64;
@@ -61,6 +60,10 @@ comptime {
} else if (@typeInfo(@TypeOf(root.main)).Fn.calling_convention != .C) {
@export(main, .{ .name = "main" });
}
+ } else if (native_arch.isRISCV()) {
+ if (!@hasDecl(root, "_start")) {
+ @export(riscv_start, .{ .name = "_start" });
+ }
} else if (native_os == .windows) {
if (!@hasDecl(root, "WinMain") and !@hasDecl(root, "WinMainCRTStartup") and
!@hasDecl(root, "wWinMain") and !@hasDecl(root, "wWinMainCRTStartup"))
@@ -151,14 +154,6 @@ fn exit2(code: usize) noreturn {
: "memory", "cc"
);
},
- .riscv64 => {
- asm volatile ("ecall"
- :
- : [number] "{a7}" (94),
- [arg1] "{a0}" (code),
- : "rcx", "r11", "memory"
- );
- },
.sparc64 => {
asm volatile ("ta 0x6d"
:
@@ -212,6 +207,11 @@ fn wasi_start() callconv(.C) void {
}
}
+fn riscv_start() callconv(.C) noreturn {
+ const code = @call(.always_inline, callMain, .{});
+ std.process.exit(code);
+}
+
fn EfiMain(handle: uefi.Handle, system_table: *uefi.tables.SystemTable) callconv(.C) usize {
uefi.handle = handle;
uefi.system_table = system_table;