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-rw-r--r--lib/std/Target.zig127
1 files changed, 28 insertions, 99 deletions
diff --git a/lib/std/Target.zig b/lib/std/Target.zig
index 1bf608ffb1..41e754d2fb 100644
--- a/lib/std/Target.zig
+++ b/lib/std/Target.zig
@@ -24,7 +24,7 @@ pub const Os = struct {
fuchsia,
ios,
linux,
- lv2,
+ ps3,
macos,
netbsd,
openbsd,
@@ -63,6 +63,11 @@ pub const Os = struct {
illumos,
other,
+ // LLVM tags deliberately omitted:
+ // - kfreebsd
+ // - darwin
+ // - nacl
+
pub inline fn isDarwin(tag: Tag) bool {
return switch (tag) {
.ios, .macos, .watchos, .tvos, .visionos => true,
@@ -138,7 +143,7 @@ pub const Os = struct {
.ananas,
.cloudabi,
.fuchsia,
- .lv2,
+ .ps3,
.zos,
.haiku,
.minix,
@@ -370,7 +375,7 @@ pub const Os = struct {
.ananas,
.cloudabi,
.fuchsia,
- .lv2,
+ .ps3,
.zos,
.haiku,
.minix,
@@ -557,7 +562,7 @@ pub const Os = struct {
.ananas,
.cloudabi,
.fuchsia,
- .lv2,
+ .ps3,
.zos,
.minix,
.rtems,
@@ -653,13 +658,17 @@ pub const Abi = enum {
amplification,
ohos,
+ // LLVM tags deliberately omitted:
+ // - gnuf64
+ // - coreclr
+
pub fn default(arch: Cpu.Arch, os: Os) Abi {
return if (arch.isWasm()) .musl else switch (os.tag) {
.freestanding,
.ananas,
.cloudabi,
.dragonfly,
- .lv2,
+ .ps3,
.zos,
.minix,
.rtems,
@@ -994,7 +1003,6 @@ pub const Cpu = struct {
powerpcle,
powerpc64,
powerpc64le,
- r600,
amdgcn,
riscv32,
riscv64,
@@ -1002,8 +1010,6 @@ pub const Cpu = struct {
sparc64,
sparcel,
s390x,
- tce,
- tcele,
thumb,
thumbeb,
x86,
@@ -1012,25 +1018,30 @@ pub const Cpu = struct {
xtensa,
nvptx,
nvptx64,
- amdil,
- amdil64,
- hsail,
- hsail64,
spir,
spir64,
spirv,
spirv32,
spirv64,
kalimba,
- shave,
lanai,
wasm32,
wasm64,
- renderscript32,
- renderscript64,
ve,
spu_2,
+ // LLVM tags deliberately omitted:
+ // - r600
+ // - le32
+ // - le64
+ // - amdil
+ // - amdil64
+ // - hsail
+ // - hsail64
+ // - shave
+ // - renderscript32
+ // - renderscript64
+
pub inline fn isX86(arch: Arch) bool {
return switch (arch) {
.x86, .x86_64 => true,
@@ -1148,26 +1159,19 @@ pub const Cpu = struct {
.mips => .MIPS,
.mipsel => .MIPS_RS3_LE,
.powerpc, .powerpcle => .PPC,
- .r600 => .NONE,
.riscv32 => .RISCV,
.sparc => .SPARC,
.sparcel => .SPARC,
- .tce => .NONE,
- .tcele => .NONE,
.thumb => .ARM,
.thumbeb => .ARM,
.x86 => .@"386",
.xcore => .XCORE,
.xtensa => .XTENSA,
.nvptx => .NONE,
- .amdil => .NONE,
- .hsail => .NONE,
.spir => .NONE,
.kalimba => .CSR_KALIMBA,
- .shave => .NONE,
.lanai => .LANAI,
.wasm32 => .NONE,
- .renderscript32 => .NONE,
.aarch64_32 => .AARCH64,
.aarch64 => .AARCH64,
.aarch64_be => .AARCH64,
@@ -1178,11 +1182,8 @@ pub const Cpu = struct {
.riscv64 => .RISCV,
.x86_64 => .X86_64,
.nvptx64 => .NONE,
- .amdil64 => .NONE,
- .hsail64 => .NONE,
.spir64 => .NONE,
.wasm64 => .NONE,
- .renderscript64 => .NONE,
.amdgcn => .AMDGPU,
.bpfel => .BPF,
.bpfeb => .BPF,
@@ -1212,26 +1213,19 @@ pub const Cpu = struct {
.mips => .Unknown,
.mipsel => .Unknown,
.powerpc, .powerpcle => .POWERPC,
- .r600 => .Unknown,
.riscv32 => .RISCV32,
.sparc => .Unknown,
.sparcel => .Unknown,
- .tce => .Unknown,
- .tcele => .Unknown,
.thumb => .Thumb,
.thumbeb => .Thumb,
.x86 => .I386,
.xcore => .Unknown,
.xtensa => .Unknown,
.nvptx => .Unknown,
- .amdil => .Unknown,
- .hsail => .Unknown,
.spir => .Unknown,
.kalimba => .Unknown,
- .shave => .Unknown,
.lanai => .Unknown,
.wasm32 => .Unknown,
- .renderscript32 => .Unknown,
.aarch64_32 => .ARM64,
.aarch64 => .ARM64,
.aarch64_be => .ARM64,
@@ -1242,11 +1236,8 @@ pub const Cpu = struct {
.riscv64 => .RISCV64,
.x86_64 => .X64,
.nvptx64 => .Unknown,
- .amdil64 => .Unknown,
- .hsail64 => .Unknown,
.spir64 => .Unknown,
.wasm64 => .Unknown,
- .renderscript64 => .Unknown,
.amdgcn => .Unknown,
.bpfel => .Unknown,
.bpfeb => .Unknown,
@@ -1270,14 +1261,10 @@ pub const Cpu = struct {
.aarch64_32,
.aarch64,
.amdgcn,
- .amdil,
- .amdil64,
.bpfel,
.csky,
.xtensa,
.hexagon,
- .hsail,
- .hsail64,
.kalimba,
.mipsel,
.mips64el,
@@ -1285,10 +1272,8 @@ pub const Cpu = struct {
.nvptx,
.nvptx64,
.sparcel,
- .tcele,
.powerpcle,
.powerpc64le,
- .r600,
.riscv32,
.riscv64,
.x86,
@@ -1299,9 +1284,6 @@ pub const Cpu = struct {
.thumb,
.spir,
.spir64,
- .renderscript32,
- .renderscript64,
- .shave,
.ve,
.spu_2,
// GPU bitness is opaque. For now, assume little endian.
@@ -1325,7 +1307,6 @@ pub const Cpu = struct {
.thumbeb,
.sparc,
.sparc64,
- .tce,
.lanai,
.s390x,
=> .big,
@@ -1780,22 +1761,12 @@ pub const DynamicLinker = struct {
.hexagon,
.m68k,
.msp430,
- .r600,
.amdgcn,
- .tce,
- .tcele,
.xcore,
- .amdil,
- .amdil64,
- .hsail,
- .hsail64,
.spir,
.spir64,
.kalimba,
- .shave,
.lanai,
- .renderscript32,
- .renderscript64,
.ve,
.dxil,
.loongarch32,
@@ -1834,7 +1805,7 @@ pub const DynamicLinker = struct {
.ananas,
.cloudabi,
.fuchsia,
- .lv2,
+ .ps3,
.zos,
.minix,
.rtems,
@@ -1884,24 +1855,17 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 {
.mipsel,
.powerpc,
.powerpcle,
- .r600,
.riscv32,
.sparcel,
- .tce,
- .tcele,
.thumb,
.thumbeb,
.x86,
.xcore,
.nvptx,
- .amdil,
- .hsail,
.spir,
.kalimba,
- .shave,
.lanai,
.wasm32,
- .renderscript32,
.aarch64_32,
.spirv32,
.loongarch32,
@@ -1918,11 +1882,8 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 {
.riscv64,
.x86_64,
.nvptx64,
- .amdil64,
- .hsail64,
.spir64,
.wasm64,
- .renderscript64,
.amdgcn,
.bpfel,
.bpfeb,
@@ -2070,12 +2031,6 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 {
.long, .ulong, .float, .double, .longdouble => return 32,
.longlong, .ulonglong => return 64,
},
- .tce, .tcele => switch (c_type) {
- .char => return 8,
- .short, .ushort => return 16,
- .int, .uint, .long, .ulong, .longlong, .ulonglong => return 32,
- .float, .double, .longdouble => return 32,
- },
.mips64, .mips64el => switch (c_type) {
.char => return 8,
.short, .ushort => return 16,
@@ -2165,12 +2120,6 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 {
.long, .ulong, .float, .double, .longdouble => return 32,
.longlong, .ulonglong => return 64,
},
- .tce, .tcele => switch (c_type) {
- .char => return 8,
- .short, .ushort => return 16,
- .int, .uint, .long, .ulong, .longlong, .ulonglong => return 32,
- .float, .double, .longdouble => return 32,
- },
.mips64, .mips64el => switch (c_type) {
.char => return 8,
.short, .ushort => return 16,
@@ -2351,7 +2300,7 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 {
},
.cloudabi,
- .lv2,
+ .ps3,
.zos,
.rtems,
.aix,
@@ -2418,15 +2367,9 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {
.xcore,
.dxil,
.loongarch32,
- .tce,
- .tcele,
- .amdil,
- .hsail,
.spir,
.spirv32,
.kalimba,
- .shave,
- .renderscript32,
.ve,
.spu_2,
.xtensa,
@@ -2434,11 +2377,9 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {
.aarch64_32,
.amdgcn,
- .amdil64,
.bpfel,
.bpfeb,
.hexagon,
- .hsail64,
.loongarch64,
.m68k,
.mips,
@@ -2449,11 +2390,9 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {
.lanai,
.nvptx,
.nvptx64,
- .r600,
.s390x,
.spir64,
.spirv64,
- .renderscript64,
=> 8,
.aarch64,
@@ -2537,15 +2476,9 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {
.xcore,
.dxil,
.loongarch32,
- .tce,
- .tcele,
- .amdil,
- .hsail,
.spir,
.spirv32,
.kalimba,
- .shave,
- .renderscript32,
.ve,
.spu_2,
.xtensa,
@@ -2559,11 +2492,9 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {
.thumbeb,
.aarch64_32,
.amdgcn,
- .amdil64,
.bpfel,
.bpfeb,
.hexagon,
- .hsail64,
.x86,
.loongarch64,
.m68k,
@@ -2575,11 +2506,9 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {
.lanai,
.nvptx,
.nvptx64,
- .r600,
.s390x,
.spir64,
.spirv64,
- .renderscript64,
=> 8,
.aarch64,
generated by cgit v1.2.3 (git 2.39.1) at 2025-12-28 00:47:39 +0000