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| author | Andrew Kelley <andrew@ziglang.org> | 2021-02-27 02:25:15 -0700 |
|---|---|---|
| committer | Andrew Kelley <andrew@ziglang.org> | 2021-02-27 02:25:15 -0700 |
| commit | d91605e27eb25ae9175f6e92d5f9f9db1ce6a714 (patch) | |
| tree | 9e7b0fe67880b364796dc3ee06524dd870cc3873 /tools/update_cpu_features.zig | |
| parent | 02bda72d918f9020887b0bafe439d0d4024b8e02 (diff) | |
| download | zig-d91605e27eb25ae9175f6e92d5f9f9db1ce6a714.tar.gz zig-d91605e27eb25ae9175f6e92d5f9f9db1ce6a714.zip | |
tools/update_cpu_features: consistent naming of neoverse cpus
Diffstat (limited to 'tools/update_cpu_features.zig')
| -rw-r--r-- | tools/update_cpu_features.zig | 25 |
1 files changed, 24 insertions, 1 deletions
diff --git a/tools/update_cpu_features.zig b/tools/update_cpu_features.zig index 6ec742e82f..a20db3701d 100644 --- a/tools/update_cpu_features.zig +++ b/tools/update_cpu_features.zig @@ -38,6 +38,22 @@ const llvm_targets = [_]LlvmTarget{ .zig_name = "contextidr_el2", .desc = "Enable RW operand Context ID Register (EL2)", }, + .{ + .llvm_name = "neoversee1", + .zig_name = "neoverse_e1", + }, + .{ + .llvm_name = "neoversen1", + .zig_name = "neoverse_n1", + }, + .{ + .llvm_name = "neoversen2", + .zig_name = "neoverse_n2", + }, + .{ + .llvm_name = "neoversev1", + .zig_name = "neoverse_v1", + }, }, }, .{ @@ -399,7 +415,14 @@ fn processOneTarget(job: Job) anyerror!void { for (all_features.items) |obj| { const llvm_name = obj.get("Name").?.String; - const description = obj.get("Desc").?.String; + const llvm_description = obj.get("Desc").?.String; + const description = for (llvm_target.feature_overrides) |feature_override| { + if (mem.eql(u8, llvm_name, feature_override.llvm_name)) { + if (feature_override.desc) |desc| { + break desc; + } + } + } else llvm_description; const zig_name = try llvmNameToZigName(arena, llvm_target, llvm_name); try w.print( \\ result[@enumToInt(Feature.{})] = .{{ |