riscv: un-cache the `avl` and `vtype` when returning from a function call

the csrs `avl` and `vtype` are considered caller-saved so it could have changed while inside of the function.
the easiest way to handle this is to just set the cached `vtype` and `avl` to null, so that the next time something
needs to set it, it'll emit an instruction instead of relying on a potentially invalid setting.

1 files changed, 3 insertions, 2 deletions

diff --git a/test/behavior/vector.zig b/test/behavior/vector.zig
index 6a1e36e9c4..d4b2acd6af 100644
--- a/test/behavior/vector.zig
+++ b/test/behavior/vector.zig
@@ -102,7 +102,6 @@ test "vector float operators" {
     if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
     if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
     if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;
-    if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
     if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
 
     if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .aarch64) {
@@ -119,7 +118,7 @@ test "vector float operators" {
             try expectEqual(v + x, .{ 11, 22, 33, 44 });
             try expectEqual(v - x, .{ 9, 18, 27, 36 });
             try expectEqual(v * x, .{ 10, 40, 90, 160 });
-            try expectEqual(-x, .{ -1, -2, -3, -4 });
+            if (builtin.zig_backend != .stage2_riscv64) try expectEqual(-x, .{ -1, -2, -3, -4 });
         }
     };
 
@@ -129,6 +128,8 @@ test "vector float operators" {
     try S.doTheTest(f64);
     try comptime S.doTheTest(f64);
 
+    if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
+
     try S.doTheTest(f16);
     try comptime S.doTheTest(f16);