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| author | joachimschmidt557 <joachim.schmidt557@outlook.com> | 2022-02-26 10:23:25 +0100 |
|---|---|---|
| committer | joachimschmidt557 <joachim.schmidt557@outlook.com> | 2022-02-26 13:00:01 +0100 |
| commit | f48f4baf676061742adb9674bc5e43e82c63f96a (patch) | |
| tree | 046a8c7ce6342b6bb929f0b5655efcfcddc66a4f /test/behavior/basic.zig | |
| parent | 8ef80cfaab2a74506d7b3a866dc066d9cd281f55 (diff) | |
| download | zig-f48f4baf676061742adb9674bc5e43e82c63f96a.tar.gz zig-f48f4baf676061742adb9674bc5e43e82c63f96a.zip | |
stage2 ARM: generate correct variants of ldr instruction
When loading an i16 for example, generate ldrsh instead of ldrh
Diffstat (limited to 'test/behavior/basic.zig')
| -rw-r--r-- | test/behavior/basic.zig | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/test/behavior/basic.zig b/test/behavior/basic.zig index db83393634..d6447862cf 100644 --- a/test/behavior/basic.zig +++ b/test/behavior/basic.zig @@ -26,7 +26,6 @@ fn testTruncate(x: u32) u8 { test "truncate to non-power-of-two integers" { if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; - if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; try testTrunc(u32, u1, 0b10101, 0b1); try testTrunc(u32, u1, 0b10110, 0b0); |