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authorDavid Rubin <daviru007@icloud.com>2024-05-12 12:24:59 -0700
committerDavid Rubin <daviru007@icloud.com>2024-06-13 02:22:04 -0700
commit083b7b483e1ad83d62ed7029822a82fff14953c5 (patch)
tree3b534a1d71fa3bc1c511788d162db28b5250b470 /test/behavior/array.zig
parentb67995689df424a0cab9186fcaf7b09bb04ffc1a (diff)
downloadzig-083b7b483e1ad83d62ed7029822a82fff14953c5.tar.gz
zig-083b7b483e1ad83d62ed7029822a82fff14953c5.zip
riscv: zero registers when using register-wide operations
what was happening is that instructions like `lb` were only affecting the lower bytes of the register and leaving the top dirty. this would lead to situtations were `cmp_eq` for example was using `xor`, which was failing because of the left-over stuff in the top of the register. with this commit, we now zero out or truncate depending on the context, to ensure instructions like xor will provide proper results.
Diffstat (limited to 'test/behavior/array.zig')
-rw-r--r--test/behavior/array.zig1
1 files changed, 0 insertions, 1 deletions
diff --git a/test/behavior/array.zig b/test/behavior/array.zig
index b442048b95..9b3c66f1ba 100644
--- a/test/behavior/array.zig
+++ b/test/behavior/array.zig
@@ -542,7 +542,6 @@ test "sentinel element count towards the ABI size calculation" {
if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
- if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
const S = struct {
fn doTheTest() !void {