fix duplicated symbols in compiler-rt tests

2 files changed, 119 insertions, 117 deletions

diff --git a/std/special/compiler_rt/aulldiv.zig b/std/special/compiler_rt/aulldiv.zig
index 2b3487dec8..511aa91f80 100644
--- a/std/special/compiler_rt/aulldiv.zig
+++ b/std/special/compiler_rt/aulldiv.zig
@@ -1,65 +1,66 @@
 const builtin = @import("builtin");
+const linkage = if (builtin.is_test) builtin.GlobalLinkage.Internal else builtin.GlobalLinkage.Strong;
+const is_win32 = builtin.os == builtin.Os.windows and builtin.arch == builtin.Arch.i386;
 
 export nakedcc fn _aulldiv() {
-    @setDebugSafety(this, false);
-
-    if (comptime builtin.os == builtin.Os.windows) {
-        if (comptime builtin.arch == builtin.Arch.i386) {
-            asm volatile (
-                \\.intel_syntax noprefix
-                \\
-                \\         push        ebx
-                \\         push        esi
-                \\         mov         eax,dword ptr [esp+18h]
-                \\         or          eax,eax
-                \\         jne         L1
-                \\         mov         ecx,dword ptr [esp+14h]
-                \\         mov         eax,dword ptr [esp+10h]
-                \\         xor         edx,edx
-                \\         div         ecx
-                \\         mov         ebx,eax
-                \\         mov         eax,dword ptr [esp+0Ch]
-                \\         div         ecx
-                \\         mov         edx,ebx
-                \\         jmp         L2
-                \\ L1:
-                \\         mov         ecx,eax
-                \\         mov         ebx,dword ptr [esp+14h]
-                \\         mov         edx,dword ptr [esp+10h]
-                \\         mov         eax,dword ptr [esp+0Ch]
-                \\ L3:
-                \\         shr         ecx,1
-                \\         rcr         ebx,1
-                \\         shr         edx,1
-                \\         rcr         eax,1
-                \\         or          ecx,ecx
-                \\         jne         L3
-                \\         div         ebx
-                \\         mov         esi,eax
-                \\         mul         dword ptr [esp+18h]
-                \\         mov         ecx,eax
-                \\         mov         eax,dword ptr [esp+14h]
-                \\         mul         esi
-                \\         add         edx,ecx
-                \\         jb          L4
-                \\         cmp         edx,dword ptr [esp+10h]
-                \\         ja          L4
-                \\         jb          L5
-                \\         cmp         eax,dword ptr [esp+0Ch]
-                \\         jbe         L5
-                \\ L4:
-                \\         dec         esi
-                \\ L5:
-                \\         xor         edx,edx
-                \\         mov         eax,esi
-                \\ L2:
-                \\         pop         esi
-                \\         pop         ebx
-                \\         ret         10h
-            );
-            unreachable;
-        }
+    if (is_win32) {
+        @setDebugSafety(this, false);
+        @setGlobalLinkage(_aulldiv, linkage);
+        asm volatile (
+            \\.intel_syntax noprefix
+            \\
+            \\         push        ebx
+            \\         push        esi
+            \\         mov         eax,dword ptr [esp+18h]
+            \\         or          eax,eax
+            \\         jne         L1
+            \\         mov         ecx,dword ptr [esp+14h]
+            \\         mov         eax,dword ptr [esp+10h]
+            \\         xor         edx,edx
+            \\         div         ecx
+            \\         mov         ebx,eax
+            \\         mov         eax,dword ptr [esp+0Ch]
+            \\         div         ecx
+            \\         mov         edx,ebx
+            \\         jmp         L2
+            \\ L1:
+            \\         mov         ecx,eax
+            \\         mov         ebx,dword ptr [esp+14h]
+            \\         mov         edx,dword ptr [esp+10h]
+            \\         mov         eax,dword ptr [esp+0Ch]
+            \\ L3:
+            \\         shr         ecx,1
+            \\         rcr         ebx,1
+            \\         shr         edx,1
+            \\         rcr         eax,1
+            \\         or          ecx,ecx
+            \\         jne         L3
+            \\         div         ebx
+            \\         mov         esi,eax
+            \\         mul         dword ptr [esp+18h]
+            \\         mov         ecx,eax
+            \\         mov         eax,dword ptr [esp+14h]
+            \\         mul         esi
+            \\         add         edx,ecx
+            \\         jb          L4
+            \\         cmp         edx,dword ptr [esp+10h]
+            \\         ja          L4
+            \\         jb          L5
+            \\         cmp         eax,dword ptr [esp+0Ch]
+            \\         jbe         L5
+            \\ L4:
+            \\         dec         esi
+            \\ L5:
+            \\         xor         edx,edx
+            \\         mov         eax,esi
+            \\ L2:
+            \\         pop         esi
+            \\         pop         ebx
+            \\         ret         10h
+        );
+        unreachable;
     }
 
     @setGlobalLinkage(_aulldiv, builtin.GlobalLinkage.Internal);
+    unreachable;
 }
diff --git a/std/special/compiler_rt/aullrem.zig b/std/special/compiler_rt/aullrem.zig
index 7945857fe5..e218890959 100644
--- a/std/special/compiler_rt/aullrem.zig
+++ b/std/special/compiler_rt/aullrem.zig
@@ -1,66 +1,67 @@
 const builtin = @import("builtin");
+const linkage = if (builtin.is_test) builtin.GlobalLinkage.Internal else builtin.GlobalLinkage.Strong;
+const is_win32 = builtin.os == builtin.Os.windows and builtin.arch == builtin.Arch.i386;
 
 export nakedcc fn _aullrem() {
-    @setDebugSafety(this, false);
-
-    if (comptime builtin.os == builtin.Os.windows) {
-        if (comptime builtin.arch == builtin.Arch.i386) {
-            asm volatile (
-                \\.intel_syntax noprefix
-                \\
-                \\         push        ebx
-                \\         mov         eax,dword ptr [esp+14h]
-                \\         or          eax,eax
-                \\         jne         L1a
-                \\         mov         ecx,dword ptr [esp+10h]
-                \\         mov         eax,dword ptr [esp+0Ch]
-                \\         xor         edx,edx
-                \\         div         ecx
-                \\         mov         eax,dword ptr [esp+8]
-                \\         div         ecx
-                \\         mov         eax,edx
-                \\         xor         edx,edx
-                \\         jmp         L2a
-                \\ L1a:
-                \\         mov         ecx,eax
-                \\         mov         ebx,dword ptr [esp+10h]
-                \\         mov         edx,dword ptr [esp+0Ch]
-                \\         mov         eax,dword ptr [esp+8]
-                \\ L3a:
-                \\         shr         ecx,1
-                \\         rcr         ebx,1
-                \\         shr         edx,1
-                \\         rcr         eax,1
-                \\         or          ecx,ecx
-                \\         jne         L3a
-                \\         div         ebx
-                \\         mov         ecx,eax
-                \\         mul         dword ptr [esp+14h]
-                \\         xchg        eax,ecx
-                \\         mul         dword ptr [esp+10h]
-                \\         add         edx,ecx
-                \\         jb          L4a
-                \\         cmp         edx,dword ptr [esp+0Ch]
-                \\         ja          L4a
-                \\         jb          L5a
-                \\         cmp         eax,dword ptr [esp+8]
-                \\         jbe         L5a
-                \\ L4a:
-                \\         sub         eax,dword ptr [esp+10h]
-                \\         sbb         edx,dword ptr [esp+14h]
-                \\ L5a:
-                \\         sub         eax,dword ptr [esp+8]
-                \\         sbb         edx,dword ptr [esp+0Ch]
-                \\         neg         edx
-                \\         neg         eax
-                \\         sbb         edx,0
-                \\ L2a:
-                \\         pop         ebx
-                \\         ret         10h
-            );
-            unreachable;
-        }
+    if (is_win32) {
+        @setDebugSafety(this, false);
+        @setGlobalLinkage(_aullrem, linkage);
+        asm volatile (
+            \\.intel_syntax noprefix
+            \\
+            \\         push        ebx
+            \\         mov         eax,dword ptr [esp+14h]
+            \\         or          eax,eax
+            \\         jne         L1a
+            \\         mov         ecx,dword ptr [esp+10h]
+            \\         mov         eax,dword ptr [esp+0Ch]
+            \\         xor         edx,edx
+            \\         div         ecx
+            \\         mov         eax,dword ptr [esp+8]
+            \\         div         ecx
+            \\         mov         eax,edx
+            \\         xor         edx,edx
+            \\         jmp         L2a
+            \\ L1a:
+            \\         mov         ecx,eax
+            \\         mov         ebx,dword ptr [esp+10h]
+            \\         mov         edx,dword ptr [esp+0Ch]
+            \\         mov         eax,dword ptr [esp+8]
+            \\ L3a:
+            \\         shr         ecx,1
+            \\         rcr         ebx,1
+            \\         shr         edx,1
+            \\         rcr         eax,1
+            \\         or          ecx,ecx
+            \\         jne         L3a
+            \\         div         ebx
+            \\         mov         ecx,eax
+            \\         mul         dword ptr [esp+14h]
+            \\         xchg        eax,ecx
+            \\         mul         dword ptr [esp+10h]
+            \\         add         edx,ecx
+            \\         jb          L4a
+            \\         cmp         edx,dword ptr [esp+0Ch]
+            \\         ja          L4a
+            \\         jb          L5a
+            \\         cmp         eax,dword ptr [esp+8]
+            \\         jbe         L5a
+            \\ L4a:
+            \\         sub         eax,dword ptr [esp+10h]
+            \\         sbb         edx,dword ptr [esp+14h]
+            \\ L5a:
+            \\         sub         eax,dword ptr [esp+8]
+            \\         sbb         edx,dword ptr [esp+0Ch]
+            \\         neg         edx
+            \\         neg         eax
+            \\         sbb         edx,0
+            \\ L2a:
+            \\         pop         ebx
+            \\         ret         10h
+        );
+        unreachable;
     }
 
     @setGlobalLinkage(_aullrem, builtin.GlobalLinkage.Internal);
+    unreachable;
 }