stage2: sparcv9: Remove dbg_arg instruction

3 files changed, 1 insertions, 38 deletions

diff --git a/src/arch/sparcv9/CodeGen.zig b/src/arch/sparcv9/CodeGen.zig
index b435b1885c..6176be73a3 100644
--- a/src/arch/sparcv9/CodeGen.zig
+++ b/src/arch/sparcv9/CodeGen.zig
@@ -780,16 +780,6 @@ fn airArg(self: *Self, inst: Air.Inst.Index) !void {
     // TODO Copy registers to the stack
     const mcv = result;
 
-    _ = try self.addInst(.{
-        .tag = .dbg_arg,
-        .data = .{
-            .dbg_arg_info = .{
-                .air_inst = inst,
-                .arg_index = arg_index,
-            },
-        },
-    });
-
     if (self.liveness.isUnused(inst))
         return self.finishAirBookkeeping();
 
@@ -1050,9 +1040,7 @@ fn airSwitch(self: *Self, inst: Air.Inst.Index) !void {
 
 fn addInst(self: *Self, inst: Mir.Inst) error{OutOfMemory}!Mir.Inst.Index {
     const gpa = self.gpa;
-
     try self.mir_instructions.ensureUnusedCapacity(gpa, 1);
-
     const result_index = @intCast(Air.Inst.Index, self.mir_instructions.len);
     self.mir_instructions.appendAssumeCapacity(inst);
     return result_index;
diff --git a/src/arch/sparcv9/Emit.zig b/src/arch/sparcv9/Emit.zig
index 91dcb4fd5f..aea25f2ffc 100644
--- a/src/arch/sparcv9/Emit.zig
+++ b/src/arch/sparcv9/Emit.zig
@@ -45,7 +45,6 @@ pub fn emitMir(
     for (mir_tags) |tag, index| {
         const inst = @intCast(u32, index);
         switch (tag) {
-            .dbg_arg => try emit.mirDbgArg(inst),
             .dbg_line => try emit.mirDbgLine(inst),
             .dbg_prologue_end => try emit.mirDebugPrologueEnd(),
             .dbg_epilogue_begin => try emit.mirDebugEpilogueBegin(),
@@ -92,17 +91,6 @@ pub fn deinit(emit: *Emit) void {
     emit.* = undefined;
 }
 
-fn mirDbgArg(emit: *Emit, inst: Mir.Inst.Index) !void {
-    const tag = emit.mir.instructions.items(.tag)[inst];
-    const dbg_arg_info = emit.mir.instructions.items(.data)[inst].dbg_arg_info;
-    _ = dbg_arg_info;
-
-    switch (tag) {
-        .dbg_arg => {}, // TODO try emit.genArgDbgInfo(dbg_arg_info.air_inst, dbg_arg_info.arg_index),
-        else => unreachable,
-    }
-}
-
 fn mirDbgLine(emit: *Emit, inst: Mir.Inst.Index) !void {
     const tag = emit.mir.instructions.items(.tag)[inst];
     const dbg_line_column = emit.mir.instructions.items(.data)[inst].dbg_line_column;
diff --git a/src/arch/sparcv9/Mir.zig b/src/arch/sparcv9/Mir.zig
index 54f147f415..8916eafe80 100644
--- a/src/arch/sparcv9/Mir.zig
+++ b/src/arch/sparcv9/Mir.zig
@@ -28,8 +28,6 @@ pub const Inst = struct {
     data: Data,
 
     pub const Tag = enum(u16) {
-        /// Pseudo-instruction: Argument
-        dbg_arg,
         /// Pseudo-instruction: End of prologue
         dbg_prologue_end,
         /// Pseudo-instruction: Beginning of epilogue
@@ -122,14 +120,6 @@ pub const Inst = struct {
     /// how to interpret the data within.
     // TODO this is a quick-n-dirty solution that needs to be cleaned up.
     pub const Data = union {
-        /// Debug info: argument
-        ///
-        /// Used by e.g. dbg_arg
-        dbg_arg_info: struct {
-            air_inst: Air.Inst.Index,
-            arg_index: usize,
-        },
-
         /// Debug info: line and column
         ///
         /// Used by e.g. dbg_line
@@ -234,10 +224,7 @@ pub const Inst = struct {
     // Note that in Debug builds, Zig is allowed to insert a secret field for safety checks.
     comptime {
         if (builtin.mode != .Debug) {
-            // TODO clean up the definition of Data before enabling this.
-            // I'll do that after the PoC backend can produce usable binaries.
-
-            // assert(@sizeOf(Data) == 8);
+            assert(@sizeOf(Data) == 8);
         }
     }
 };