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| author | David Rubin <daviru007@icloud.com> | 2024-07-15 01:50:35 -0700 |
|---|---|---|
| committer | David Rubin <daviru007@icloud.com> | 2024-07-26 04:05:40 -0700 |
| commit | d3f75522d7e18188748558c2ae20928b83d173bf (patch) | |
| tree | fc691c36c0adfbd14d426c53f9422c5a562542de /src | |
| parent | c78ebeb44ce078a165e3302b629432eeee6a656d (diff) | |
| download | zig-d3f75522d7e18188748558c2ae20928b83d173bf.tar.gz zig-d3f75522d7e18188748558c2ae20928b83d173bf.zip | |
lower: fix logic bug in `cmp_gt`
Diffstat (limited to 'src')
| -rw-r--r-- | src/arch/riscv64/Lower.zig | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/src/arch/riscv64/Lower.zig b/src/arch/riscv64/Lower.zig index 012f520485..f33fe68fae 100644 --- a/src/arch/riscv64/Lower.zig +++ b/src/arch/riscv64/Lower.zig @@ -304,7 +304,6 @@ pub fn lowerMir(lower: *Lower, index: Mir.Inst.Index, options: struct { }; const is_unsigned = ty.isUnsignedInt(pt.zcu); - const less_than: Encoding.Mnemonic = if (is_unsigned) .sltu else .slt; switch (class) { @@ -338,8 +337,8 @@ pub fn lowerMir(lower: *Lower, index: Mir.Inst.Index, options: struct { .gt => { try lower.emit(less_than, &.{ .{ .reg = rd }, - .{ .reg = rs1 }, .{ .reg = rs2 }, + .{ .reg = rs1 }, }); }, .gte => { @@ -348,7 +347,6 @@ pub fn lowerMir(lower: *Lower, index: Mir.Inst.Index, options: struct { .{ .reg = rs1 }, .{ .reg = rs2 }, }); - try lower.emit(.xori, &.{ .{ .reg = rd }, .{ .reg = rd }, |