diff options
| author | joachimschmidt557 <joachim.schmidt557@outlook.com> | 2021-12-26 17:05:08 +0100 |
|---|---|---|
| committer | joachimschmidt557 <joachim.schmidt557@outlook.com> | 2021-12-26 17:05:08 +0100 |
| commit | 8a0e86cd5cfd13792ce74ebac7a0cd20fb9e3c11 (patch) | |
| tree | 362af302cba25a78d169585b94419cc94c31e358 /src | |
| parent | 15f0f9240d1183e5c6c60006b5ff4e02d3d98ce7 (diff) | |
| download | zig-8a0e86cd5cfd13792ce74ebac7a0cd20fb9e3c11.tar.gz zig-8a0e86cd5cfd13792ce74ebac7a0cd20fb9e3c11.zip | |
stage2 ARM: implement load for types with size 8 (e.g. slices)
Diffstat (limited to 'src')
| -rw-r--r-- | src/arch/arm/CodeGen.zig | 33 |
1 files changed, 31 insertions, 2 deletions
diff --git a/src/arch/arm/CodeGen.zig b/src/arch/arm/CodeGen.zig index 28020e7b16..ee68daaecf 100644 --- a/src/arch/arm/CodeGen.zig +++ b/src/arch/arm/CodeGen.zig @@ -1317,8 +1317,37 @@ fn load(self: *Self, dst_mcv: MCValue, ptr: MCValue, ptr_ty: Type) InnerError!vo .stack_offset => |off| { if (elem_ty.abiSize(self.target.*) <= 4) { const tmp_reg = try self.register_manager.allocReg(null, &.{}); - try self.load(.{ .register = tmp_reg }, ptr, elem_ty); - return self.genSetStack(elem_ty, off, MCValue{ .register = tmp_reg }); + try self.load(.{ .register = tmp_reg }, ptr, ptr_ty); + try self.genSetStack(elem_ty, off, MCValue{ .register = tmp_reg }); + } else if (elem_ty.abiSize(self.target.*) == 8) { + // TODO generalize this: maybe add a + // genArmMemcpy function which manually copies + // data if the size is below a certain + // threshold and calls "memcpy" if the size is + // larger + + const usize_ty = Type.initTag(.usize); + const tmp_regs = try self.register_manager.allocRegs(2, .{ null, null }, &.{}); + _ = try self.addInst(.{ + .tag = .ldr, + .cond = .al, + .data = .{ .rr_offset = .{ + .rt = tmp_regs[0], + .rn = reg, + .offset = .{ .offset = Instruction.Offset.none }, + } }, + }); + _ = try self.addInst(.{ + .tag = .ldr, + .cond = .al, + .data = .{ .rr_offset = .{ + .rt = tmp_regs[1], + .rn = reg, + .offset = .{ .offset = Instruction.Offset.imm(4) }, + } }, + }); + try self.genSetStack(usize_ty, off, MCValue{ .register = tmp_regs[0] }); + try self.genSetStack(usize_ty, off + 4, MCValue{ .register = tmp_regs[1] }); } else { return self.fail("TODO implement memcpy", .{}); } |