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authorjoachimschmidt557 <joachim.schmidt557@outlook.com>2022-03-30 11:09:05 +0200
committerjoachimschmidt557 <joachim.schmidt557@outlook.com>2022-04-01 22:02:56 +0200
commit77e70189f438316a8d4e48b2457be0b5eb5974f3 (patch)
tree4e1766b7c0f35d9a0fa17cecd582d45bdca754fe /src
parent37a8c28802b418718487995a1fa6000b0aab8a84 (diff)
downloadzig-77e70189f438316a8d4e48b2457be0b5eb5974f3.tar.gz
zig-77e70189f438316a8d4e48b2457be0b5eb5974f3.zip
stage2 ARM: implement shl_with_overflow for ints <= 32 bits
Diffstat (limited to 'src')
-rw-r--r--src/arch/arm/CodeGen.zig50
1 files changed, 48 insertions, 2 deletions
diff --git a/src/arch/arm/CodeGen.zig b/src/arch/arm/CodeGen.zig
index 360b3ad97b..00d82349eb 100644
--- a/src/arch/arm/CodeGen.zig
+++ b/src/arch/arm/CodeGen.zig
@@ -1457,8 +1457,54 @@ fn airMulWithOverflow(self: *Self, inst: Air.Inst.Index) !void {
}
fn airShlWithOverflow(self: *Self, inst: Air.Inst.Index) !void {
- _ = inst;
- return self.fail("TODO implement airShlWithOverflow for {}", .{self.target.cpu.arch});
+ const ty_pl = self.air.instructions.items(.data)[inst].ty_pl;
+ const extra = self.air.extraData(Air.Bin, ty_pl.payload).data;
+ if (self.liveness.isUnused(inst)) return self.finishAir(inst, .dead, .{ extra.lhs, extra.rhs, .none });
+ const result: MCValue = result: {
+ const lhs = try self.resolveInst(extra.lhs);
+ const rhs = try self.resolveInst(extra.rhs);
+ const lhs_ty = self.air.typeOf(extra.lhs);
+ const rhs_ty = self.air.typeOf(extra.rhs);
+
+ const tuple_ty = self.air.typeOfIndex(inst);
+ const tuple_size = @intCast(u32, tuple_ty.abiSize(self.target.*));
+ const tuple_align = tuple_ty.abiAlignment(self.target.*);
+ const overflow_bit_offset = @intCast(u32, tuple_ty.structFieldOffset(1, self.target.*));
+
+ switch (lhs_ty.zigTypeTag()) {
+ .Vector => return self.fail("TODO implement shl_with_overflow for vectors", .{}),
+ .Int => {
+ const int_info = lhs_ty.intInfo(self.target.*);
+ if (int_info.bits <= 32) {
+ const stack_offset = try self.allocMem(inst, tuple_size, tuple_align);
+
+ if (lhs == .register) self.register_manager.freezeRegs(&.{lhs.register});
+ defer if (lhs == .register) self.register_manager.unfreezeRegs(&.{lhs.register});
+
+ try self.spillCompareFlagsIfOccupied();
+ self.compare_flags_inst = null;
+
+ // lsl dest, lhs, rhs
+ const dest = try self.binOp(.shl, null, lhs, rhs, lhs_ty, rhs_ty);
+
+ // asr/lsr reconstructed, dest, rhs
+ const reconstructed = try self.binOp(.shr, null, dest, rhs, lhs_ty, rhs_ty);
+
+ // cmp lhs, reconstructed
+ _ = try self.binOp(.cmp_eq, null, lhs, reconstructed, lhs_ty, lhs_ty);
+
+ try self.genSetStack(lhs_ty, stack_offset, dest);
+ try self.genSetStack(Type.initTag(.u1), stack_offset - overflow_bit_offset, .{ .compare_flags_unsigned = .neq });
+
+ break :result MCValue{ .stack_offset = stack_offset };
+ } else {
+ return self.fail("TODO ARM overflow operations on integers > u32/i32", .{});
+ }
+ },
+ else => unreachable,
+ }
+ };
+ return self.finishAir(inst, result, .{ extra.lhs, extra.rhs, .none });
}
fn airDiv(self: *Self, inst: Air.Inst.Index) !void {