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| author | Jacob Young <jacobly0@users.noreply.github.com> | 2023-05-12 01:16:52 -0400 |
|---|---|---|
| committer | Jacob Young <jacobly0@users.noreply.github.com> | 2023-05-15 03:07:51 -0400 |
| commit | 3681da25f865d499cffe923b7f0721cf759d3591 (patch) | |
| tree | 329952ecd7bb6f5947f96b79e446e372ab3c7006 /src | |
| parent | c23e80e671686278ea2ea23d164a2c0839ca372c (diff) | |
| download | zig-3681da25f865d499cffe923b7f0721cf759d3591.tar.gz zig-3681da25f865d499cffe923b7f0721cf759d3591.zip | |
x86_64: remove scratch data tags
Diffstat (limited to 'src')
| -rw-r--r-- | src/arch/x86_64/CodeGen.zig | 8 | ||||
| -rw-r--r-- | src/arch/x86_64/Lower.zig | 32 | ||||
| -rw-r--r-- | src/arch/x86_64/Mir.zig | 24 |
3 files changed, 26 insertions, 38 deletions
diff --git a/src/arch/x86_64/CodeGen.zig b/src/arch/x86_64/CodeGen.zig index 29232b5284..4f5bf89989 100644 --- a/src/arch/x86_64/CodeGen.zig +++ b/src/arch/x86_64/CodeGen.zig @@ -1079,9 +1079,9 @@ fn asmSetccRegister(self: *Self, reg: Register, cc: bits.Condition) !void { .fixes = Mir.Inst.Fixes.fromCondition(cc), .r1 = reg, } }, - .z_and_np, .nz_or_p => .{ .r_scratch = .{ + .z_and_np, .nz_or_p => .{ .rr = .{ .r1 = reg, - .scratch_reg = (try self.register_manager.allocReg(null, gp)).to8(), + .r2 = (try self.register_manager.allocReg(null, gp)).to8(), } }, }, }); @@ -1120,8 +1120,8 @@ fn asmSetccMemory(self: *Self, m: Memory, cc: bits.Condition) !void { .fixes = Mir.Inst.Fixes.fromCondition(cc), .payload = payload, } }, - .z_and_np, .nz_or_p => .{ .x_scratch = .{ - .scratch_reg = (try self.register_manager.allocReg(null, gp)).to8(), + .z_and_np, .nz_or_p => .{ .rx = .{ + .r1 = (try self.register_manager.allocReg(null, gp)).to8(), .payload = payload, } }, }, diff --git a/src/arch/x86_64/Lower.zig b/src/arch/x86_64/Lower.zig index c893429912..f6bce992e6 100644 --- a/src/arch/x86_64/Lower.zig +++ b/src/arch/x86_64/Lower.zig @@ -95,54 +95,54 @@ pub fn lowerMir(lower: *Lower, index: Mir.Inst.Index) Error!struct { }, .pseudo_set_z_and_np_r => { try lower.emit(.none, .setz, &.{ - .{ .reg = inst.data.r_scratch.r1 }, + .{ .reg = inst.data.rr.r1 }, }); try lower.emit(.none, .setnp, &.{ - .{ .reg = inst.data.r_scratch.scratch_reg }, + .{ .reg = inst.data.rr.r2 }, }); try lower.emit(.none, .@"and", &.{ - .{ .reg = inst.data.r_scratch.r1 }, - .{ .reg = inst.data.r_scratch.scratch_reg }, + .{ .reg = inst.data.rr.r1 }, + .{ .reg = inst.data.rr.r2 }, }); }, .pseudo_set_z_and_np_m_sib, .pseudo_set_z_and_np_m_rip, => { try lower.emit(.none, .setz, &.{ - .{ .mem = lower.mem(inst.ops, inst.data.x_scratch.payload) }, + .{ .mem = lower.mem(inst.ops, inst.data.rx.payload) }, }); try lower.emit(.none, .setnp, &.{ - .{ .reg = inst.data.x_scratch.scratch_reg }, + .{ .reg = inst.data.rx.r1 }, }); try lower.emit(.none, .@"and", &.{ - .{ .mem = lower.mem(inst.ops, inst.data.x_scratch.payload) }, - .{ .reg = inst.data.x_scratch.scratch_reg }, + .{ .mem = lower.mem(inst.ops, inst.data.rx.payload) }, + .{ .reg = inst.data.rx.r1 }, }); }, .pseudo_set_nz_or_p_r => { try lower.emit(.none, .setnz, &.{ - .{ .reg = inst.data.r_scratch.r1 }, + .{ .reg = inst.data.rr.r1 }, }); try lower.emit(.none, .setp, &.{ - .{ .reg = inst.data.r_scratch.scratch_reg }, + .{ .reg = inst.data.rr.r2 }, }); try lower.emit(.none, .@"or", &.{ - .{ .reg = inst.data.r_scratch.r1 }, - .{ .reg = inst.data.r_scratch.scratch_reg }, + .{ .reg = inst.data.rr.r1 }, + .{ .reg = inst.data.rr.r2 }, }); }, .pseudo_set_nz_or_p_m_sib, .pseudo_set_nz_or_p_m_rip, => { try lower.emit(.none, .setnz, &.{ - .{ .mem = lower.mem(inst.ops, inst.data.x_scratch.payload) }, + .{ .mem = lower.mem(inst.ops, inst.data.rx.payload) }, }); try lower.emit(.none, .setp, &.{ - .{ .reg = inst.data.x_scratch.scratch_reg }, + .{ .reg = inst.data.rx.r1 }, }); try lower.emit(.none, .@"or", &.{ - .{ .mem = lower.mem(inst.ops, inst.data.x_scratch.payload) }, - .{ .reg = inst.data.x_scratch.scratch_reg }, + .{ .mem = lower.mem(inst.ops, inst.data.rx.payload) }, + .{ .reg = inst.data.rx.r1 }, }); }, .pseudo_j_z_and_np_inst => { diff --git a/src/arch/x86_64/Mir.zig b/src/arch/x86_64/Mir.zig index 18c2903045..919974e7d2 100644 --- a/src/arch/x86_64/Mir.zig +++ b/src/arch/x86_64/Mir.zig @@ -711,27 +711,27 @@ pub const Inst = struct { pseudo_cmov_nz_or_p_rm_rip, /// Set byte if zero flag set and parity flag not set /// Requires a scratch register! - /// Uses `r_scratch` payload. + /// Uses `rr` payload. pseudo_set_z_and_np_r, /// Set byte if zero flag set and parity flag not set /// Requires a scratch register! - /// Uses `x_scratch` payload. + /// Uses `rx` payload. pseudo_set_z_and_np_m_sib, /// Set byte if zero flag set and parity flag not set /// Requires a scratch register! - /// Uses `x_scratch` payload. + /// Uses `rx` payload. pseudo_set_z_and_np_m_rip, /// Set byte if zero flag not set or parity flag set /// Requires a scratch register! - /// Uses `r_scratch` payload. + /// Uses `rr` payload. pseudo_set_nz_or_p_r, /// Set byte if zero flag not set or parity flag set /// Requires a scratch register! - /// Uses `x_scratch` payload. + /// Uses `rx` payload. pseudo_set_nz_or_p_m_sib, /// Set byte if zero flag not set or parity flag set /// Requires a scratch register! - /// Uses `x_scratch` payload. + /// Uses `rx` payload. pseudo_set_nz_or_p_m_rip, /// Jump if zero flag set and parity flag not set /// Uses `inst` payload. @@ -836,18 +836,6 @@ pub const Inst = struct { i: u8, payload: u32, }, - /// Register, scratch register - r_scratch: struct { - fixes: Fixes = ._, - r1: Register, - scratch_reg: Register, - }, - /// Scratch register, followed by Custom payload found in extra. - x_scratch: struct { - fixes: Fixes = ._, - scratch_reg: Register, - payload: u32, - }, /// Custom payload found in extra. x: struct { fixes: Fixes = ._, |
