stage2: sparc64: Add airMemset placeholder

1 files changed, 15 insertions, 1 deletions

diff --git a/src/arch/sparc64/CodeGen.zig b/src/arch/sparc64/CodeGen.zig
index b77d76a10e..cfd2426bd3 100644
--- a/src/arch/sparc64/CodeGen.zig
+++ b/src/arch/sparc64/CodeGen.zig
@@ -611,7 +611,7 @@ fn genBody(self: *Self, body: []const Air.Inst.Index) InnerError!void {
             .atomic_rmw      => @panic("TODO try self.airAtomicRmw(inst)"),
             .atomic_load     => @panic("TODO try self.airAtomicLoad(inst)"),
             .memcpy          => @panic("TODO try self.airMemcpy(inst)"),
-            .memset          => @panic("TODO try self.airMemset(inst)"),
+            .memset          => try self.airMemset(inst),
             .set_union_tag   => @panic("TODO try self.airSetUnionTag(inst)"),
             .get_union_tag   => @panic("TODO try self.airGetUnionTag(inst)"),
             .clz             => @panic("TODO try self.airClz(inst)"),
@@ -1569,6 +1569,20 @@ fn airLoop(self: *Self, inst: Air.Inst.Index) !void {
     return self.finishAirBookkeeping();
 }
 
+fn airMemset(self: *Self, inst: Air.Inst.Index) !void {
+    const pl_op = self.air.instructions.items(.data)[inst].pl_op;
+    const extra = self.air.extraData(Air.Bin, pl_op.payload);
+
+    const operand = pl_op.operand;
+    const value = extra.data.lhs;
+    const length = extra.data.rhs;
+    _ = operand;
+    _ = value;
+    _ = length;
+
+    return self.fail("TODO implement airMemset for {}", .{self.target.cpu.arch});
+}
+
 fn airNot(self: *Self, inst: Air.Inst.Index) !void {
     const ty_op = self.air.instructions.items(.data)[inst].ty_op;
     const result: MCValue = if (self.liveness.isUnused(inst)) .dead else result: {