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| author | Jakub Konka <kubkon@jakubkonka.com> | 2021-12-15 17:18:38 +0100 |
|---|---|---|
| committer | Jakub Konka <kubkon@jakubkonka.com> | 2021-12-15 17:28:48 +0100 |
| commit | 04784463772decb18d70734747d3fc89c043b979 (patch) | |
| tree | 2552ad30128a68dac5386c501414c21cd4a11425 /src | |
| parent | 510357355a3ca597daf13fadb6aa8f7df72ea26a (diff) | |
| download | zig-04784463772decb18d70734747d3fc89c043b979.tar.gz zig-04784463772decb18d70734747d3fc89c043b979.zip | |
stage2: fix register size selection
This actually needs proper rework, and I'll get to that when refactoring
MIR.
Diffstat (limited to 'src')
| -rw-r--r-- | src/arch/x86_64/CodeGen.zig | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/src/arch/x86_64/CodeGen.zig b/src/arch/x86_64/CodeGen.zig index 2de37b05bc..378184f70a 100644 --- a/src/arch/x86_64/CodeGen.zig +++ b/src/arch/x86_64/CodeGen.zig @@ -1635,7 +1635,7 @@ fn genBinMathOpMir( .tag = mir_tag, .ops = (Mir.Ops{ .reg1 = registerAlias(dst_reg, @intCast(u32, abi_size)), - .reg2 = .ebp, + .reg2 = registerAlias(.rbp, @intCast(u32, abi_size)), .flags = 0b01, }).encode(), .data = .{ .imm = -@intCast(i32, adj_off) }, @@ -1666,7 +1666,7 @@ fn genBinMathOpMir( .tag = mir_tag, .ops = (Mir.Ops{ .reg1 = registerAlias(src_reg, @intCast(u32, abi_size)), - .reg2 = .ebp, + .reg2 = registerAlias(.rbp, @intCast(u32, abi_size)), .flags = 0b10, }).encode(), .data = .{ .imm = -@intCast(i32, adj_off) }, @@ -2835,12 +2835,11 @@ fn genSetStack(self: *Self, ty: Type, stack_offset: u32, mcv: MCValue) InnerErro } const abi_size = ty.abiSize(self.target.*); const adj_off = stack_offset + abi_size; - // TODO select instruction size _ = try self.addInst(.{ .tag = .mov, .ops = (Mir.Ops{ .reg1 = registerAlias(reg, @intCast(u32, abi_size)), - .reg2 = .rbp, + .reg2 = registerAlias(.rbp, @intCast(u32, abi_size)), .flags = 0b10, }).encode(), .data = .{ .imm = -@intCast(i32, adj_off) }, @@ -3061,7 +3060,7 @@ fn genSetReg(self: *Self, ty: Type, reg: Register, mcv: MCValue) InnerError!void .tag = .mov, .ops = (Mir.Ops{ .reg1 = registerAlias(reg, @intCast(u32, abi_size)), - .reg2 = .ebp, + .reg2 = registerAlias(.rbp, @intCast(u32, abi_size)), .flags = 0b01, }).encode(), .data = .{ .imm = ioff }, |