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| author | Jakub Konka <kubkon@jakubkonka.com> | 2022-06-07 18:30:59 +0200 |
|---|---|---|
| committer | Jakub Konka <kubkon@jakubkonka.com> | 2022-06-07 19:33:43 +0200 |
| commit | 03068ce6a67d2cf83954606dc96329b85bd4be1a (patch) | |
| tree | c77dc2b1edcfec298db9cae0d16b2f65be36ac92 /src | |
| parent | a8bce8f14b5a2a3a6b5e069f3b434fd9430d9a8e (diff) | |
| download | zig-03068ce6a67d2cf83954606dc96329b85bd4be1a.tar.gz zig-03068ce6a67d2cf83954606dc96329b85bd4be1a.zip | |
x64: clean up store helper
Diffstat (limited to 'src')
| -rw-r--r-- | src/arch/x86_64/CodeGen.zig | 51 |
1 files changed, 9 insertions, 42 deletions
diff --git a/src/arch/x86_64/CodeGen.zig b/src/arch/x86_64/CodeGen.zig index 5c81233845..839063e0e4 100644 --- a/src/arch/x86_64/CodeGen.zig +++ b/src/arch/x86_64/CodeGen.zig @@ -2730,15 +2730,7 @@ fn store(self: *Self, ptr: MCValue, value: MCValue, ptr_ty: Type, value_ty: Type // movabs does not support indirect register addressing // so we need an extra register and an extra mov. const tmp_reg = try self.copyToTmpRegister(value_ty, value); - _ = try self.addInst(.{ - .tag = .mov, - .ops = Mir.Inst.Ops.encode(.{ - .reg1 = reg.to64(), - .reg2 = tmp_reg.to64(), - .flags = 0b10, - }), - .data = .{ .imm = 0 }, - }); + return self.store(ptr, .{ .register = tmp_reg }, ptr_ty, value_ty); }, else => { return self.fail("TODO implement set pointee with immediate of ABI size {d}", .{abi_size}); @@ -2835,6 +2827,8 @@ fn store(self: *Self, ptr: MCValue, value: MCValue, ptr_ty: Type, value_ty: Type .data = .{ .imm = 0 }, }); + const new_ptr = MCValue{ .register = addr_reg.to64() }; + switch (value) { .immediate => |imm| { if (abi_size > 8) { @@ -2873,16 +2867,8 @@ fn store(self: *Self, ptr: MCValue, value: MCValue, ptr_ty: Type, value_ty: Type .data = .{ .payload = payload }, }); }, - .register => |reg| { - _ = try self.addInst(.{ - .tag = .mov, - .ops = Mir.Inst.Ops.encode(.{ - .reg1 = addr_reg.to64(), - .reg2 = reg, - .flags = 0b10, - }), - .data = .{ .imm = 0 }, - }); + .register => { + return self.store(new_ptr, value, ptr_ty, value_ty); }, .got_load, .direct_load, @@ -2904,37 +2890,18 @@ fn store(self: *Self, ptr: MCValue, value: MCValue, ptr_ty: Type, value_ty: Type }), .data = .{ .imm = 0 }, }); - _ = try self.addInst(.{ - .tag = .mov, - .ops = Mir.Inst.Ops.encode(.{ - .reg1 = addr_reg.to64(), - .reg2 = tmp_reg, - .flags = 0b10, - }), - .data = .{ .imm = 0 }, - }); - return; + return self.store(new_ptr, .{ .register = tmp_reg }, ptr_ty, value_ty); } - try self.genInlineMemcpy(.{ .register = addr_reg.to64() }, value, .{ .immediate = abi_size }, .{}); + try self.genInlineMemcpy(new_ptr, value, .{ .immediate = abi_size }, .{}); }, .stack_offset => { if (abi_size <= 8) { - // TODO this should really be a recursive call const tmp_reg = try self.copyToTmpRegister(value_ty, value); - _ = try self.addInst(.{ - .tag = .mov, - .ops = Mir.Inst.Ops.encode(.{ - .reg1 = addr_reg.to64(), - .reg2 = tmp_reg, - .flags = 0b10, - }), - .data = .{ .imm = 0 }, - }); - return; + return self.store(new_ptr, .{ .register = tmp_reg }, ptr_ty, value_ty); } - try self.genInlineMemcpy(.{ .register = addr_reg.to64() }, value, .{ .immediate = abi_size }, .{}); + try self.genInlineMemcpy(new_ptr, value, .{ .immediate = abi_size }, .{}); }, else => return self.fail("TODO implement storing {} to MCValue.memory", .{value}), } |