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authormlugg <mlugg@mlugg.co.uk>2024-02-27 02:00:55 +0000
committermlugg <mlugg@mlugg.co.uk>2024-02-29 23:38:17 +0000
commitf6abf022b790847e6145569241e4e5685abf359c (patch)
tree3058edcd61dcbe4d531c7705da8d3e0566967710 /src/zig_llvm.cpp
parentf0a4bb6bd15b8a605e450af3359fe1622302463a (diff)
downloadzig-f6abf022b790847e6145569241e4e5685abf359c.tar.gz
zig-f6abf022b790847e6145569241e4e5685abf359c.zip
AstGen: elide block instruction when already in empty body
In the code `if (cond) { ... }`, the "then body" of the `if` is technically a block. However, we don't need to emit a real ZIR `block` corresponding to it, because we are already within a condbr body; we have a separate gz, and appropriate scoping for allocs and debug variables. In this case, and many like it, we can trivially elide the block here, instead emitting the block statements directly into the current `GenZir`. This results in a significant decrease in ZIR bytes for real code.
Diffstat (limited to 'src/zig_llvm.cpp')
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