std.Target.CpuFeatures is now a struct with both CPU and feature set

Previously it was a tagged union which was one of:
 * baseline
 * a specific CPU
 * a set of features

Now, it's possible to have a CPU but also modify the CPU's feature set
on top of that. This is closer to what LLVM does.

This is more correct because Zig's notion of CPUs (and LLVM's) is not
exact CPU models. For example "skylake" is not one very specific model;
there are several different pieces of hardware that match "skylake" that
have different feature sets enabled.

1 files changed, 24 insertions, 25 deletions

diff --git a/src/userland.cpp b/src/userland.cpp
index 64849b65ed..8524be5739 100644
--- a/src/userland.cpp
+++ b/src/userland.cpp
@@ -2,7 +2,8 @@
 // src-self-hosted/stage1.zig
 
 #include "userland.h"
-#include "ast_render.hpp"
+#include "util.hpp"
+#include "zig_llvm.h"
 #include <stdio.h>
 #include <stdlib.h>
 #include <string.h>
@@ -96,32 +97,30 @@ struct Stage2CpuFeatures {
     const char *cache_hash;
 };
 
-Error stage2_cpu_features_parse_cpu(Stage2CpuFeatures **out, const char *zig_triple, const char *str) {
-    const char *msg = "stage0 called stage2_cpu_features_parse_cpu";
-    stage2_panic(msg, strlen(msg));
-}
-Error stage2_cpu_features_parse_features(Stage2CpuFeatures **out, const char *zig_triple, const char *str) {
-    const char *msg = "stage0 called stage2_cpu_features_parse_features";
-    stage2_panic(msg, strlen(msg));
-}
-Error stage2_cpu_features_baseline(Stage2CpuFeatures **out, const char *zig_triple) {
-    Stage2CpuFeatures *result = allocate<Stage2CpuFeatures>(1, "Stage2CpuFeatures");
-    result->builtin_str = ".baseline;\n";
-    result->cache_hash = "\n\n";
-    *out = result;
-    return ErrorNone;
-}
-Error stage2_cpu_features_llvm(Stage2CpuFeatures **out, const char *zig_triple,
-        const char *llvm_cpu_name, const char *llvm_features)
+Error stage2_cpu_features_parse(struct Stage2CpuFeatures **out, const char *zig_triple,
+        const char *cpu_name, const char *cpu_features)
 {
-    Stage2CpuFeatures *result = allocate<Stage2CpuFeatures>(1, "Stage2CpuFeatures");
-    result->llvm_cpu_name = llvm_cpu_name;
-    result->llvm_cpu_features = llvm_features;
-    result->builtin_str = ".baseline;\n";
-    result->cache_hash = "native\n\n";
-    *out = result;
-    return ErrorNone;
+    if (zig_triple == nullptr) {
+        Stage2CpuFeatures *result = allocate<Stage2CpuFeatures>(1, "Stage2CpuFeatures");
+        result->llvm_cpu_name = ZigLLVMGetHostCPUName();
+        result->llvm_cpu_features = ZigLLVMGetNativeFeatures();
+        result->builtin_str = "arch.getBaselineCpuFeatures();\n";
+        result->cache_hash = "native\n\n";
+        *out = result;
+        return ErrorNone;
+    }
+    if (cpu_name == nullptr && cpu_features == nullptr) {
+        Stage2CpuFeatures *result = allocate<Stage2CpuFeatures>(1, "Stage2CpuFeatures");
+        result->builtin_str = "arch.getBaselineCpuFeatures();\n";
+        result->cache_hash = "\n\n";
+        *out = result;
+        return ErrorNone;
+    }
+
+    const char *msg = "stage0 called stage2_cpu_features_parse with non-null cpu name or features";
+    stage2_panic(msg, strlen(msg));
 }
+
 void stage2_cpu_features_get_cache_hash(const Stage2CpuFeatures *cpu_features,
         const char **ptr, size_t *len)
 {