stage2: implement `@minimum` and `@maximum`, including vectors

 * std.os: take advantage of `@minimum`. It's probably time to
   deprecate `std.min` and `std.max`.
 * New AIR instructions: min and max
 * Introduce SIMD vector support to stage2
 * Add `@Type` support for vectors
 * Sema: add `checkSimdBinOp` which can be re-used for other arithmatic
   operators that want to support vectors.
 * Implement coercion from vectors to arrays.
   - In backends this is handled with bitcast for vector to array,
     however maybe we want to reduce the amount of branching by
     introducing an explicit AIR instruction for it in the future.
 * LLVM backend: implement lowering vector types
 * Sema: Implement `slice.ptr` at comptime
 * Value: improve `numberMin` and `numberMax` to support floats in
   addition to integers, and make them behave properly in the presence
   of NaN.

1 files changed, 15 insertions, 0 deletions

diff --git a/src/type.zig b/src/type.zig
index e0ca0d426f..9ddeb507af 100644
--- a/src/type.zig
+++ b/src/type.zig
@@ -2517,6 +2517,14 @@ pub const Type = extern union {
         };
     }
 
+    /// For vectors, returns the element type. Otherwise returns self.
+    pub fn scalarType(ty: Type) Type {
+        return switch (ty.zigTypeTag()) {
+            .Vector => ty.childType(),
+            else => ty,
+        };
+    }
+
     /// Asserts that the type is an optional.
     /// Resulting `Type` will have inner memory referencing `buf`.
     pub fn optionalChild(self: Type, buf: *Payload.ElemType) Type {
@@ -4017,6 +4025,13 @@ pub const Type = extern union {
         });
     }
 
+    pub fn vector(arena: *Allocator, len: u64, elem_type: Type) Allocator.Error!Type {
+        return Tag.vector.create(arena, .{
+            .len = len,
+            .elem_type = elem_type,
+        });
+    }
+
     pub fn smallestUnsignedBits(max: u64) u16 {
         if (max == 0) return 0;
         const base = std.math.log2(max);