riscv: big rewrite to use latest liveness

this one is even harder to document then the last large overhaul.

TLDR;
- split apart Emit.zig into an Emit.zig and a Lower.zig
- created seperate files for the encoding, and now adding a new instruction
is as simple as just adding it to a couple of switch statements and providing the encoding.
- relocs are handled in a more sane maner, and we have a clear defining boundary between
lea_symbol and load_symbol now.
- a lot of different abstractions for things like the stack, memory, registers, and others.
- we're using x86_64's FrameIndex now, which simplifies a lot of the tougher design process.
- a lot more that I don't have the energy to document. at this point, just read the commit itself :p

1 files changed, 1 insertions, 1 deletions

diff --git a/src/target.zig b/src/target.zig
index 8f61b2ba03..ea58111bc1 100644
--- a/src/target.zig
+++ b/src/target.zig
@@ -526,7 +526,7 @@ pub fn backendSupportsFeature(
     feature: Feature,
 ) bool {
     return switch (feature) {
-        .panic_fn => ofmt == .c or use_llvm or cpu_arch == .x86_64 or cpu_arch == .riscv64,
+        .panic_fn => ofmt == .c or use_llvm or cpu_arch == .x86_64,
         .panic_unwrap_error => ofmt == .c or use_llvm,
         .safety_check_formatted => ofmt == .c or use_llvm,
         .error_return_trace => use_llvm,