Merge branch 'master' into zen_stdlib

1 files changed, 103 insertions, 18 deletions

diff --git a/src/target.cpp b/src/target.cpp
index 5008b51a09..91d36c5109 100644
--- a/src/target.cpp
+++ b/src/target.cpp
@@ -597,12 +597,15 @@ void resolve_target_object_format(ZigTarget *target) {
         case ZigLLVM_tce:
         case ZigLLVM_tcele:
         case ZigLLVM_thumbeb:
-        case ZigLLVM_wasm32:
-        case ZigLLVM_wasm64:
         case ZigLLVM_xcore:
             target->oformat= ZigLLVM_ELF;
             return;
 
+        case ZigLLVM_wasm32:
+        case ZigLLVM_wasm64:
+            target->oformat = ZigLLVM_Wasm;
+            return;
+
         case ZigLLVM_ppc:
         case ZigLLVM_ppc64:
             if (is_os_darwin(target)) {
@@ -683,25 +686,46 @@ static int get_arch_pointer_bit_width(ZigLLVM_ArchType arch) {
 uint32_t target_c_type_size_in_bits(const ZigTarget *target, CIntType id) {
     switch (target->os) {
         case OsFreestanding:
-            switch (id) {
-                case CIntTypeShort:
-                case CIntTypeUShort:
-                    return 16;
-                case CIntTypeInt:
-                case CIntTypeUInt:
-                    return 32;
-                case CIntTypeLong:
-                case CIntTypeULong:
-                    return get_arch_pointer_bit_width(target->arch.arch);
-                case CIntTypeLongLong:
-                case CIntTypeULongLong:
-                    return 64;
-                case CIntTypeCount:
-                    zig_unreachable();
+            switch (target->arch.arch) {
+                case ZigLLVM_msp430:
+                    switch (id) {
+                        case CIntTypeShort:
+                        case CIntTypeUShort:
+                            return 16;
+                        case CIntTypeInt:
+                        case CIntTypeUInt:
+                            return 16;
+                        case CIntTypeLong:
+                        case CIntTypeULong:
+                            return 32;
+                        case CIntTypeLongLong:
+                        case CIntTypeULongLong:
+                            return 64;
+                        case CIntTypeCount:
+                            zig_unreachable();
+                    }
+                default:
+                    switch (id) {
+                        case CIntTypeShort:
+                        case CIntTypeUShort:
+                            return 16;
+                        case CIntTypeInt:
+                        case CIntTypeUInt:
+                            return 32;
+                        case CIntTypeLong:
+                        case CIntTypeULong:
+                            return get_arch_pointer_bit_width(target->arch.arch);
+                        case CIntTypeLongLong:
+                        case CIntTypeULongLong:
+                            return 64;
+                        case CIntTypeCount:
+                            zig_unreachable();
+                    }
             }
         case OsLinux:
         case OsMacOSX:
         case OsZen:
+        case OsOpenBSD:
             switch (id) {
                 case CIntTypeShort:
                 case CIntTypeUShort:
@@ -742,7 +766,6 @@ uint32_t target_c_type_size_in_bits(const ZigTarget *target, CIntType id) {
         case OsKFreeBSD:
         case OsLv2:
         case OsNetBSD:
-        case OsOpenBSD:
         case OsSolaris:
         case OsHaiku:
         case OsMinix:
@@ -896,3 +919,65 @@ bool target_can_exec(const ZigTarget *host_target, const ZigTarget *guest_target
 
     return false;
 }
+
+const char *arch_stack_pointer_register_name(const ArchType *arch) {
+    switch (arch->arch) {
+        case ZigLLVM_UnknownArch:
+            zig_unreachable();
+        case ZigLLVM_x86:
+            return "sp";
+        case ZigLLVM_x86_64:
+            return "rsp";
+
+        case ZigLLVM_aarch64:
+        case ZigLLVM_arm:
+        case ZigLLVM_thumb:
+        case ZigLLVM_aarch64_be:
+        case ZigLLVM_amdgcn:
+        case ZigLLVM_amdil:
+        case ZigLLVM_amdil64:
+        case ZigLLVM_armeb:
+        case ZigLLVM_arc:
+        case ZigLLVM_avr:
+        case ZigLLVM_bpfeb:
+        case ZigLLVM_bpfel:
+        case ZigLLVM_hexagon:
+        case ZigLLVM_lanai:
+        case ZigLLVM_hsail:
+        case ZigLLVM_hsail64:
+        case ZigLLVM_kalimba:
+        case ZigLLVM_le32:
+        case ZigLLVM_le64:
+        case ZigLLVM_mips:
+        case ZigLLVM_mips64:
+        case ZigLLVM_mips64el:
+        case ZigLLVM_mipsel:
+        case ZigLLVM_msp430:
+        case ZigLLVM_nios2:
+        case ZigLLVM_nvptx:
+        case ZigLLVM_nvptx64:
+        case ZigLLVM_ppc64le:
+        case ZigLLVM_r600:
+        case ZigLLVM_renderscript32:
+        case ZigLLVM_renderscript64:
+        case ZigLLVM_riscv32:
+        case ZigLLVM_riscv64:
+        case ZigLLVM_shave:
+        case ZigLLVM_sparc:
+        case ZigLLVM_sparcel:
+        case ZigLLVM_sparcv9:
+        case ZigLLVM_spir:
+        case ZigLLVM_spir64:
+        case ZigLLVM_systemz:
+        case ZigLLVM_tce:
+        case ZigLLVM_tcele:
+        case ZigLLVM_thumbeb:
+        case ZigLLVM_wasm32:
+        case ZigLLVM_wasm64:
+        case ZigLLVM_xcore:
+        case ZigLLVM_ppc:
+        case ZigLLVM_ppc64:
+            zig_panic("TODO populate this table with stack pointer register name for this CPU architecture");
+    }
+    zig_unreachable();
+}