diff options
| author | Andrew Kelley <superjoe30@gmail.com> | 2018-03-08 10:59:54 -0500 |
|---|---|---|
| committer | Andrew Kelley <superjoe30@gmail.com> | 2018-03-08 10:59:54 -0500 |
| commit | 3200ebc2ea5f6bb51130cbc69d6533144a9f4ddc (patch) | |
| tree | e234c061c28a95c35afbb35b80b89e3114ecdeb9 /src/target.cpp | |
| parent | 2e010c60ae006944ae20ab8b3445598471c9f1e8 (diff) | |
| parent | b57cb04afc1898c3b21ef3486709f0c0aa285433 (diff) | |
| download | zig-3200ebc2ea5f6bb51130cbc69d6533144a9f4ddc.tar.gz zig-3200ebc2ea5f6bb51130cbc69d6533144a9f4ddc.zip | |
Merge branch 'llvm6'
Zig now depends on LLVM 6.0.0.
The latest commit that depends on LLVM 5.0.1 is
2e010c60ae006944ae20ab8b3445598471c9f1e8.
Diffstat (limited to 'src/target.cpp')
| -rw-r--r-- | src/target.cpp | 28 |
1 files changed, 27 insertions, 1 deletions
diff --git a/src/target.cpp b/src/target.cpp index 182da84e09..6bcb86d0b0 100644 --- a/src/target.cpp +++ b/src/target.cpp @@ -13,6 +13,7 @@ #include <stdio.h> static const ArchType arch_list[] = { + {ZigLLVM_arm, ZigLLVM_ARMSubArch_v8_3a}, {ZigLLVM_arm, ZigLLVM_ARMSubArch_v8_2a}, {ZigLLVM_arm, ZigLLVM_ARMSubArch_v8_1a}, {ZigLLVM_arm, ZigLLVM_ARMSubArch_v8}, @@ -33,9 +34,30 @@ static const ArchType arch_list[] = { {ZigLLVM_arm, ZigLLVM_ARMSubArch_v5te}, {ZigLLVM_arm, ZigLLVM_ARMSubArch_v4t}, - {ZigLLVM_armeb, ZigLLVM_NoSubArch}, + {ZigLLVM_armeb, ZigLLVM_ARMSubArch_v8_3a}, + {ZigLLVM_armeb, ZigLLVM_ARMSubArch_v8_2a}, + {ZigLLVM_armeb, ZigLLVM_ARMSubArch_v8_1a}, + {ZigLLVM_armeb, ZigLLVM_ARMSubArch_v8}, + {ZigLLVM_armeb, ZigLLVM_ARMSubArch_v8r}, + {ZigLLVM_armeb, ZigLLVM_ARMSubArch_v8m_baseline}, + {ZigLLVM_armeb, ZigLLVM_ARMSubArch_v8m_mainline}, + {ZigLLVM_armeb, ZigLLVM_ARMSubArch_v7}, + {ZigLLVM_armeb, ZigLLVM_ARMSubArch_v7em}, + {ZigLLVM_armeb, ZigLLVM_ARMSubArch_v7m}, + {ZigLLVM_armeb, ZigLLVM_ARMSubArch_v7s}, + {ZigLLVM_armeb, ZigLLVM_ARMSubArch_v7k}, + {ZigLLVM_armeb, ZigLLVM_ARMSubArch_v7ve}, + {ZigLLVM_armeb, ZigLLVM_ARMSubArch_v6}, + {ZigLLVM_armeb, ZigLLVM_ARMSubArch_v6m}, + {ZigLLVM_armeb, ZigLLVM_ARMSubArch_v6k}, + {ZigLLVM_armeb, ZigLLVM_ARMSubArch_v6t2}, + {ZigLLVM_armeb, ZigLLVM_ARMSubArch_v5}, + {ZigLLVM_armeb, ZigLLVM_ARMSubArch_v5te}, + {ZigLLVM_armeb, ZigLLVM_ARMSubArch_v4t}, + {ZigLLVM_aarch64, ZigLLVM_NoSubArch}, {ZigLLVM_aarch64_be, ZigLLVM_NoSubArch}, + {ZigLLVM_arc, ZigLLVM_NoSubArch}, {ZigLLVM_avr, ZigLLVM_NoSubArch}, {ZigLLVM_bpfel, ZigLLVM_NoSubArch}, {ZigLLVM_bpfeb, ZigLLVM_NoSubArch}, @@ -144,6 +166,7 @@ static const ZigLLVM_EnvironmentType environ_list[] = { ZigLLVM_UnknownEnvironment, ZigLLVM_GNU, + ZigLLVM_GNUABIN32, ZigLLVM_GNUABI64, ZigLLVM_GNUEABI, ZigLLVM_GNUEABIHF, @@ -161,6 +184,7 @@ static const ZigLLVM_EnvironmentType environ_list[] = { ZigLLVM_AMDOpenCL, ZigLLVM_CoreCLR, ZigLLVM_OpenCL, + ZigLLVM_Simulator, }; static const ZigLLVM_ObjectFormatType oformat_list[] = { @@ -521,6 +545,7 @@ void resolve_target_object_format(ZigTarget *target) { case ZigLLVM_amdil: case ZigLLVM_amdil64: case ZigLLVM_armeb: + case ZigLLVM_arc: case ZigLLVM_avr: case ZigLLVM_bpfeb: case ZigLLVM_bpfel: @@ -583,6 +608,7 @@ static int get_arch_pointer_bit_width(ZigLLVM_ArchType arch) { case ZigLLVM_msp430: return 16; + case ZigLLVM_arc: case ZigLLVM_arm: case ZigLLVM_armeb: case ZigLLVM_hexagon: |