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authorAndrew Kelley <andrew@ziglang.org>2021-09-30 21:38:04 -0700
committerAndrew Kelley <andrew@ziglang.org>2021-09-30 21:38:04 -0700
commit3eb729b442d6cc69bd9a9d37816e9458190bc30b (patch)
treea412281c18914503c1566e79ab6a6f4eea187bf3 /src/stage1/ir.cpp
parent1f653b7f8e9e358a5bfe2695a11c01da56f3d5ee (diff)
parentc4cd592f0e1eeff5a4056796610d97010ae4e38c (diff)
downloadzig-3eb729b442d6cc69bd9a9d37816e9458190bc30b.tar.gz
zig-3eb729b442d6cc69bd9a9d37816e9458190bc30b.zip
Merge remote-tracking branch 'origin/master' into llvm13
Diffstat (limited to 'src/stage1/ir.cpp')
-rw-r--r--src/stage1/ir.cpp97
1 files changed, 57 insertions, 40 deletions
diff --git a/src/stage1/ir.cpp b/src/stage1/ir.cpp
index 0604c05c46..2f2cfe08f3 100644
--- a/src/stage1/ir.cpp
+++ b/src/stage1/ir.cpp
@@ -6374,7 +6374,7 @@ static Stage1AirInst *ir_analyze_enum_to_union(IrAnalyze *ira, Scope *scope, Ast
if (target->value->type->data.enumeration.non_exhaustive) {
ir_add_error_node(ira, source_node,
- buf_sprintf("runtime cast to union '%s' from non-exhustive enum",
+ buf_sprintf("runtime cast to union '%s' from non-exhaustive enum",
buf_ptr(&wanted_type->name)));
return ira->codegen->invalid_inst_gen;
}
@@ -9820,28 +9820,28 @@ static ErrorMsg *ir_eval_math_op_scalar(IrAnalyze *ira, Scope *scope, AstNode *s
float_min(out_val, op1_val, op2_val);
}
break;
- case IrBinOpSatAdd:
+ case IrBinOpAddSat:
if (is_int) {
bigint_add_sat(&out_val->data.x_bigint, &op1_val->data.x_bigint, &op2_val->data.x_bigint, type_entry->data.integral.bit_count, type_entry->data.integral.is_signed);
} else {
zig_unreachable();
}
break;
- case IrBinOpSatSub:
+ case IrBinOpSubSat:
if (is_int) {
bigint_sub_sat(&out_val->data.x_bigint, &op1_val->data.x_bigint, &op2_val->data.x_bigint, type_entry->data.integral.bit_count, type_entry->data.integral.is_signed);
} else {
zig_unreachable();
}
break;
- case IrBinOpSatMul:
+ case IrBinOpMultSat:
if (is_int) {
bigint_mul_sat(&out_val->data.x_bigint, &op1_val->data.x_bigint, &op2_val->data.x_bigint, type_entry->data.integral.bit_count, type_entry->data.integral.is_signed);
} else {
zig_unreachable();
}
break;
- case IrBinOpSatShl:
+ case IrBinOpShlSat:
if (is_int) {
bigint_shl_sat(&out_val->data.x_bigint, &op1_val->data.x_bigint, &op2_val->data.x_bigint, type_entry->data.integral.bit_count, type_entry->data.integral.is_signed);
} else {
@@ -10069,10 +10069,10 @@ static bool ok_float_op(IrBinOp op) {
case IrBinOpBitShiftRightExact:
case IrBinOpAddWrap:
case IrBinOpSubWrap:
- case IrBinOpSatAdd:
- case IrBinOpSatSub:
- case IrBinOpSatMul:
- case IrBinOpSatShl:
+ case IrBinOpAddSat:
+ case IrBinOpSubSat:
+ case IrBinOpMultSat:
+ case IrBinOpShlSat:
case IrBinOpMultWrap:
case IrBinOpArrayCat:
case IrBinOpArrayMult:
@@ -11046,10 +11046,10 @@ static Stage1AirInst *ir_analyze_instruction_bin_op(IrAnalyze *ira, Stage1ZirIns
case IrBinOpRemMod:
case IrBinOpMaximum:
case IrBinOpMinimum:
- case IrBinOpSatAdd:
- case IrBinOpSatSub:
- case IrBinOpSatMul:
- case IrBinOpSatShl:
+ case IrBinOpAddSat:
+ case IrBinOpSubSat:
+ case IrBinOpMultSat:
+ case IrBinOpShlSat:
return ir_analyze_bin_op_math(ira, bin_op_instruction);
case IrBinOpArrayCat:
return ir_analyze_array_cat(ira, bin_op_instruction);
@@ -15189,7 +15189,7 @@ static Stage1AirInst *ir_analyze_container_field_ptr(IrAnalyze *ira, Buf *field_
return ir_analyze_inferred_field_ptr(ira, field_name, scope, source_node, container_ptr, bare_type);
}
- // Tracks wether we should return an undefined value of the correct type.
+ // Tracks whether we should return an undefined value of the correct type.
// We do this if the container pointer is undefined and we are in a TypeOf call.
bool return_undef = container_ptr->value->special == ConstValSpecialUndef && \
get_scope_typeof(scope) != nullptr;
@@ -15248,7 +15248,7 @@ static Stage1AirInst *ir_analyze_container_field_ptr(IrAnalyze *ira, Buf *field_
if (type_is_invalid(union_val->type))
return ira->codegen->invalid_inst_gen;
- // Reject undefined values unless we're intializing the union:
+ // Reject undefined values unless we're initializing the union:
// a undefined union means also the tag is undefined, accessing
// its payload slot is UB.
const UndefAllowed allow_undef = initializing ? UndefOk : UndefBad;
@@ -16124,7 +16124,7 @@ static Stage1AirInst *ir_analyze_instruction_optional_unwrap_ptr(IrAnalyze *ira,
static Stage1AirInst *ir_analyze_instruction_ctz(IrAnalyze *ira, Stage1ZirInstCtz *instruction) {
Error err;
-
+
ZigType *int_type = ir_resolve_int_type(ira, instruction->type->child);
if (type_is_invalid(int_type))
return ira->codegen->invalid_inst_gen;
@@ -16166,7 +16166,7 @@ static Stage1AirInst *ir_analyze_instruction_ctz(IrAnalyze *ira, Stage1ZirInstCt
return ira->codegen->invalid_inst_gen;
if (val->special == ConstValSpecialUndef)
return ir_const_undef(ira, instruction->base.scope, instruction->base.source_node, ira->codegen->builtin_types.entry_num_lit_int);
-
+
if (is_vector) {
ZigType *smallest_vec_type = get_vector_type(ira->codegen, vector_len, smallest_type);
Stage1AirInst *result = ir_const(ira, instruction->base.scope, instruction->base.source_node, smallest_vec_type);
@@ -16200,7 +16200,7 @@ static Stage1AirInst *ir_analyze_instruction_ctz(IrAnalyze *ira, Stage1ZirInstCt
static Stage1AirInst *ir_analyze_instruction_clz(IrAnalyze *ira, Stage1ZirInstClz *instruction) {
Error err;
-
+
ZigType *int_type = ir_resolve_int_type(ira, instruction->type->child);
if (type_is_invalid(int_type))
return ira->codegen->invalid_inst_gen;
@@ -16242,7 +16242,7 @@ static Stage1AirInst *ir_analyze_instruction_clz(IrAnalyze *ira, Stage1ZirInstCl
return ira->codegen->invalid_inst_gen;
if (val->special == ConstValSpecialUndef)
return ir_const_undef(ira, instruction->base.scope, instruction->base.source_node, ira->codegen->builtin_types.entry_num_lit_int);
-
+
if (is_vector) {
ZigType *smallest_vec_type = get_vector_type(ira->codegen, vector_len, smallest_type);
Stage1AirInst *result = ir_const(ira, instruction->base.scope, instruction->base.source_node, smallest_vec_type);
@@ -16276,7 +16276,7 @@ static Stage1AirInst *ir_analyze_instruction_clz(IrAnalyze *ira, Stage1ZirInstCl
static Stage1AirInst *ir_analyze_instruction_pop_count(IrAnalyze *ira, Stage1ZirInstPopCount *instruction) {
Error err;
-
+
ZigType *int_type = ir_resolve_int_type(ira, instruction->type->child);
if (type_is_invalid(int_type))
return ira->codegen->invalid_inst_gen;
@@ -16318,7 +16318,7 @@ static Stage1AirInst *ir_analyze_instruction_pop_count(IrAnalyze *ira, Stage1Zir
return ira->codegen->invalid_inst_gen;
if (val->special == ConstValSpecialUndef)
return ir_const_undef(ira, instruction->base.scope, instruction->base.source_node, ira->codegen->builtin_types.entry_num_lit_int);
-
+
if (is_vector) {
ZigType *smallest_vec_type = get_vector_type(ira->codegen, vector_len, smallest_type);
Stage1AirInst *result = ir_const(ira, instruction->base.scope, instruction->base.source_node, smallest_vec_type);
@@ -17904,7 +17904,7 @@ static ZigValue *create_ptr_like_type_info(IrAnalyze *ira, Scope *scope, AstNode
result->special = ConstValSpecialStatic;
result->type = type_info_pointer_type;
- ZigValue **fields = alloc_const_vals_ptrs(ira->codegen, 7);
+ ZigValue **fields = alloc_const_vals_ptrs(ira->codegen, 8);
result->data.x_struct.fields = fields;
// size: Size
@@ -17939,24 +17939,29 @@ static ZigValue *create_ptr_like_type_info(IrAnalyze *ira, Scope *scope, AstNode
lazy_align_of->base.id = LazyValueIdAlignOf;
lazy_align_of->target_type = ir_const_type(ira, scope, source_node, attrs_type->data.pointer.child_type);
}
- // child: type
- ensure_field_index(result->type, "child", 4);
+ // address_space: AddressSpace,
+ ensure_field_index(result->type, "address_space", 4);
fields[4]->special = ConstValSpecialStatic;
- fields[4]->type = ira->codegen->builtin_types.entry_type;
- fields[4]->data.x_type = attrs_type->data.pointer.child_type;
- // is_allowzero: bool
- ensure_field_index(result->type, "is_allowzero", 5);
+ fields[4]->type = get_builtin_type(ira->codegen, "AddressSpace");
+ bigint_init_unsigned(&fields[4]->data.x_enum_tag, AddressSpaceGeneric);
+ // child: type
+ ensure_field_index(result->type, "child", 5);
fields[5]->special = ConstValSpecialStatic;
- fields[5]->type = ira->codegen->builtin_types.entry_bool;
- fields[5]->data.x_bool = attrs_type->data.pointer.allow_zero;
- // sentinel: anytype
- ensure_field_index(result->type, "sentinel", 6);
+ fields[5]->type = ira->codegen->builtin_types.entry_type;
+ fields[5]->data.x_type = attrs_type->data.pointer.child_type;
+ // is_allowzero: bool
+ ensure_field_index(result->type, "is_allowzero", 6);
fields[6]->special = ConstValSpecialStatic;
+ fields[6]->type = ira->codegen->builtin_types.entry_bool;
+ fields[6]->data.x_bool = attrs_type->data.pointer.allow_zero;
+ // sentinel: anytype
+ ensure_field_index(result->type, "sentinel", 7);
+ fields[7]->special = ConstValSpecialStatic;
if (attrs_type->data.pointer.sentinel != nullptr) {
- fields[6]->type = get_optional_type(ira->codegen, attrs_type->data.pointer.child_type);
- set_optional_payload(fields[6], attrs_type->data.pointer.sentinel);
+ fields[7]->type = get_optional_type(ira->codegen, attrs_type->data.pointer.child_type);
+ set_optional_payload(fields[7], attrs_type->data.pointer.sentinel);
} else {
- fields[6]->type = ira->codegen->builtin_types.entry_null;
+ fields[7]->type = ira->codegen->builtin_types.entry_null;
}
return result;
@@ -18465,7 +18470,7 @@ static Error ir_make_type_info_value(IrAnalyze *ira, Scope *scope, AstNode *sour
result->special = ConstValSpecialStatic;
result->type = ir_type_info_get_type(ira, "Fn", nullptr);
- ZigValue **fields = alloc_const_vals_ptrs(ira->codegen, 6);
+ ZigValue **fields = alloc_const_vals_ptrs(ira->codegen, 7);
result->data.x_struct.fields = fields;
// calling_convention: TypeInfo.CallingConvention
@@ -18826,11 +18831,11 @@ static ZigType *type_info_to_type(IrAnalyze *ira, Scope *scope, AstNode *source_
assert(size_value->type == ir_type_info_get_type(ira, "Size", type_info_pointer_type));
BuiltinPtrSize size_enum_index = (BuiltinPtrSize)bigint_as_u32(&size_value->data.x_enum_tag);
PtrLen ptr_len = size_enum_index_to_ptr_len(size_enum_index);
- ZigType *elem_type = get_const_field_meta_type(ira, source_node, payload, "child", 4);
+ ZigType *elem_type = get_const_field_meta_type(ira, source_node, payload, "child", 5);
if (type_is_invalid(elem_type))
return ira->codegen->invalid_inst_gen->value->type;
ZigValue *sentinel;
- if ((err = get_const_field_sentinel(ira, scope, source_node, payload, "sentinel", 6,
+ if ((err = get_const_field_sentinel(ira, scope, source_node, payload, "sentinel", 7,
elem_type, &sentinel)))
{
return ira->codegen->invalid_inst_gen->value->type;
@@ -18845,6 +18850,19 @@ static ZigType *type_info_to_type(IrAnalyze *ira, Scope *scope, AstNode *source_
if (alignment == nullptr)
return ira->codegen->invalid_inst_gen->value->type;
+ ZigValue *as_value = get_const_field(ira, source_node, payload, "address_space", 4);
+ if (as_value == nullptr)
+ return ira->codegen->invalid_inst_gen->value->type;
+ assert(as_value->special == ConstValSpecialStatic);
+ assert(as_value->type == get_builtin_type(ira->codegen, "AddressSpace"));
+ AddressSpace as = (AddressSpace)bigint_as_u32(&as_value->data.x_enum_tag);
+ if (as != AddressSpaceGeneric) {
+ ir_add_error_node(ira, source_node, buf_sprintf(
+ "address space '%s' not available in stage 1 compiler, must be .generic",
+ address_space_name(as)));
+ return ira->codegen->invalid_inst_gen->value->type;
+ }
+
bool is_const;
if ((err = get_const_field_bool(ira, source_node, payload, "is_const", 1, &is_const)))
return ira->codegen->invalid_inst_gen->value->type;
@@ -18857,13 +18875,12 @@ static ZigType *type_info_to_type(IrAnalyze *ira, Scope *scope, AstNode *source_
}
bool is_allowzero;
- if ((err = get_const_field_bool(ira, source_node, payload, "is_allowzero", 5,
+ if ((err = get_const_field_bool(ira, source_node, payload, "is_allowzero", 6,
&is_allowzero)))
{
return ira->codegen->invalid_inst_gen->value->type;
}
-
ZigType *ptr_type = get_pointer_to_type_extra2(ira->codegen,
elem_type,
is_const,