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| author | Alex Rønne Petersen <alex@alexrp.com> | 2025-08-24 21:23:45 +0200 |
|---|---|---|
| committer | Alex Rønne Petersen <alex@alexrp.com> | 2025-08-25 16:15:17 +0200 |
| commit | 5d019abe4ec70373db7a75c2a8a3e2d76939817c (patch) | |
| tree | 4ca5e04afceab7cc8e363d7adfe0436f54a3e82a /src/link/Elf.zig | |
| parent | 12686d9b7df8fe4c2663cd8e2136991dc3cf661c (diff) | |
| download | zig-5d019abe4ec70373db7a75c2a8a3e2d76939817c.tar.gz zig-5d019abe4ec70373db7a75c2a8a3e2d76939817c.zip | |
start adding big endian RISC-V support
The big endian RISC-V effort is mostly driven by MIPS (the company) which is
pivoting to RISC-V, and presumably needs a big endian variant to fill the niche
that big endian MIPS (the ISA) did.
GCC already supports these targets, but LLVM support will only appear in 22;
this commit just adds the necessary target knowledge and checks on our end.
Diffstat (limited to 'src/link/Elf.zig')
| -rw-r--r-- | src/link/Elf.zig | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/src/link/Elf.zig b/src/link/Elf.zig index 99d0ad71b0..0ebbb9f27e 100644 --- a/src/link/Elf.zig +++ b/src/link/Elf.zig @@ -3722,8 +3722,8 @@ pub fn tpAddress(self: *Elf) i64 { const phdr = self.phdrs.items[index]; const addr = switch (self.getTarget().cpu.arch) { .x86_64 => mem.alignForward(u64, phdr.p_vaddr + phdr.p_memsz, phdr.p_align), - .aarch64 => mem.alignBackward(u64, phdr.p_vaddr - 16, phdr.p_align), - .riscv64 => phdr.p_vaddr, + .aarch64, .aarch64_be => mem.alignBackward(u64, phdr.p_vaddr - 16, phdr.p_align), + .riscv64, .riscv64be => phdr.p_vaddr, else => |arch| std.debug.panic("TODO implement getTpAddress for {s}", .{@tagName(arch)}), }; return @intCast(addr); @@ -4099,8 +4099,8 @@ pub fn getTarget(self: *const Elf) *const std.Target { fn requiresThunks(self: Elf) bool { return switch (self.getTarget().cpu.arch) { - .aarch64 => true, - .x86_64, .riscv64 => false, + .aarch64, .aarch64_be => true, + .x86_64, .riscv64, .riscv64be => false, else => @panic("TODO unimplemented architecture"), }; } @@ -4345,8 +4345,8 @@ fn createThunks(elf_file: *Elf, atom_list: *AtomList) !void { // A branch will need an extender if its target is larger than // `2^(jump_bits - 1) - margin` where margin is some arbitrary number. const max_distance = switch (cpu_arch) { - .aarch64 => 0x500_000, - .x86_64, .riscv64 => unreachable, + .aarch64, .aarch64_be => 0x500_000, + .x86_64, .riscv64, .riscv64be => unreachable, else => @panic("unhandled arch"), }; @@ -4392,7 +4392,7 @@ fn createThunks(elf_file: *Elf, atom_list: *AtomList) !void { log.debug("atom({f}) {s}", .{ ref, atom_ptr.name(elf_file) }); for (atom_ptr.relocs(elf_file)) |rel| { const is_reachable = switch (cpu_arch) { - .aarch64 => r: { + .aarch64, .aarch64_be => r: { const r_type: elf.R_AARCH64 = @enumFromInt(rel.r_type()); if (r_type != .CALL26 and r_type != .JUMP26) break :r true; const target_ref = file_ptr.resolveSymbol(rel.r_sym(), elf_file); @@ -4406,7 +4406,7 @@ fn createThunks(elf_file: *Elf, atom_list: *AtomList) !void { _ = math.cast(i28, taddr + rel.r_addend - saddr) orelse break :r false; break :r true; }, - .x86_64, .riscv64 => unreachable, + .x86_64, .riscv64, .riscv64be => unreachable, else => @panic("unsupported arch"), }; if (is_reachable) continue; |
