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| author | Andrew Kelley <superjoe30@gmail.com> | 2017-08-26 13:06:13 -0400 |
|---|---|---|
| committer | Andrew Kelley <superjoe30@gmail.com> | 2017-08-26 13:06:13 -0400 |
| commit | 3a4ea41fe891b5b0b9b50cb80200a392e20cc31f (patch) | |
| tree | 9744b57a1f2dbd99e9fb87567a73167e4738219c /src/ir.cpp | |
| parent | 2b8f98a52c64301ae5bfc83936434af6c88d77d7 (diff) | |
| download | zig-3a4ea41fe891b5b0b9b50cb80200a392e20cc31f.tar.gz zig-3a4ea41fe891b5b0b9b50cb80200a392e20cc31f.zip | |
add some asserts in switch analysis code
Diffstat (limited to 'src/ir.cpp')
| -rw-r--r-- | src/ir.cpp | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/ir.cpp b/src/ir.cpp index c39950081f..39ff969dd6 100644 --- a/src/ir.cpp +++ b/src/ir.cpp @@ -14202,6 +14202,8 @@ static TypeTableEntry *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira if (!end_val) return ira->codegen->builtin_types.entry_invalid; + assert(start_val->type->id == TypeTableEntryIdInt || start_val->type->id == TypeTableEntryIdNumLitInt); + assert(end_val->type->id == TypeTableEntryIdInt || end_val->type->id == TypeTableEntryIdNumLitInt); AstNode *prev_node = rangeset_add_range(&rs, &start_val->data.x_bigint, &end_val->data.x_bigint, start_value->source_node); if (prev_node != nullptr) { |