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| author | Andrew Kelley <superjoe30@gmail.com> | 2017-02-28 03:32:12 -0500 |
|---|---|---|
| committer | Andrew Kelley <superjoe30@gmail.com> | 2017-02-28 03:32:12 -0500 |
| commit | 03b6d9f547417e1f56f5dfb5079f7aa2dee832a6 (patch) | |
| tree | f84b969a4b6f474953fc156372798199bc2842b3 /src/ir.cpp | |
| parent | 9eb29e81f956080b358a79d3567204f656350620 (diff) | |
| download | zig-03b6d9f547417e1f56f5dfb5079f7aa2dee832a6.tar.gz zig-03b6d9f547417e1f56f5dfb5079f7aa2dee832a6.zip | |
fix assertion failure for some switch errors
Diffstat (limited to 'src/ir.cpp')
| -rw-r--r-- | src/ir.cpp | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/ir.cpp b/src/ir.cpp index 6fbea22b09..fb1670fe82 100644 --- a/src/ir.cpp +++ b/src/ir.cpp @@ -10233,6 +10233,8 @@ static TypeTableEntry *ir_analyze_instruction_switch_br(IrAnalyze *ira, for (size_t i = 0; i < case_count; i += 1) { IrInstructionSwitchBrCase *new_case = &cases[i]; + if (new_case->value == ira->codegen->invalid_instruction) + return ir_unreach_error(ira); new_case->block->ref_instruction = &switch_br_instruction->base; } |