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authorLemonBoy <thatlemon@gmail.com>2020-11-26 13:19:30 +0100
committerAndrew Kelley <andrew@ziglang.org>2021-01-02 17:12:57 -0700
commit1c13ca5a05978011283ff55a586443b10b69fc85 (patch)
tree30a411c8e359467ba520d3f8e68ebf8500aceffa /src/codegen
parentdd973fb365dbbe11ce5beac8b4889bfab3fddc4d (diff)
downloadzig-1c13ca5a05978011283ff55a586443b10b69fc85.tar.gz
zig-1c13ca5a05978011283ff55a586443b10b69fc85.zip
stage2: Use {s} instead of {} when formatting strings
Diffstat (limited to 'src/codegen')
-rw-r--r--src/codegen/c.zig15
-rw-r--r--src/codegen/llvm.zig125
2 files changed, 133 insertions, 7 deletions
diff --git a/src/codegen/c.zig b/src/codegen/c.zig
index c6c29942d9..b97e1590e3 100644
--- a/src/codegen/c.zig
+++ b/src/codegen/c.zig
@@ -235,7 +235,7 @@ fn renderFunctionSignature(
try writer.writeAll(", ");
}
try renderType(ctx, writer, tv.ty.fnParamType(index));
- try writer.print(" arg{}", .{index});
+ try writer.print(" arg{d}", .{index});
}
}
try writer.writeByte(')');
@@ -481,8 +481,9 @@ fn genBinOp(ctx: *Context, file: *C, inst: *Inst.BinOp, operator: []const u8) !?
const rhs = try ctx.resolveInst(inst.rhs);
const writer = file.main.writer();
const name = try ctx.name();
- try renderTypeAndName(ctx, writer, inst.base.ty, name, .Const);
- try writer.print(" = {s} {s} {s};\n", .{ lhs, operator, rhs });
+ try writer.writeAll(indentation ++ "const ");
+ try renderType(ctx, writer, inst.base.ty);
+ try writer.print(" {s} = {s} " ++ operator ++ " {s};\n", .{ name, lhs, rhs });
return name;
}
@@ -587,7 +588,7 @@ fn genAsm(ctx: *Context, file: *C, as: *Inst.Assembly) !?[]u8 {
const arg = as.args[index];
try writer.writeAll("register ");
try renderType(ctx, writer, arg.ty);
- try writer.print(" {}_constant __asm__(\"{}\") = ", .{ reg, reg });
+ try writer.print(" {s}_constant __asm__(\"{s}\") = ", .{ reg, reg });
// TODO merge constant handling into inst_map as well
if (arg.castTag(.constant)) |c| {
try renderValue(ctx, writer, arg.ty, c.val);
@@ -597,13 +598,13 @@ fn genAsm(ctx: *Context, file: *C, as: *Inst.Assembly) !?[]u8 {
if (!gop.found_existing) {
return ctx.fail(ctx.decl.src(), "Internal error in C backend: asm argument not found in inst_map", .{});
}
- try writer.print("{};\n ", .{gop.entry.value});
+ try writer.print("{s};\n ", .{gop.entry.value});
}
} else {
return ctx.fail(ctx.decl.src(), "TODO non-explicit inline asm regs", .{});
}
}
- try writer.print("__asm {} (\"{}\"", .{ if (as.is_volatile) @as([]const u8, "volatile") else "", as.asm_source });
+ try writer.print("__asm {s} (\"{s}\"", .{ if (as.is_volatile) @as([]const u8, "volatile") else "", as.asm_source });
if (as.output) |o| {
return ctx.fail(ctx.decl.src(), "TODO inline asm output", .{});
}
@@ -619,7 +620,7 @@ fn genAsm(ctx: *Context, file: *C, as: *Inst.Assembly) !?[]u8 {
if (index > 0) {
try writer.writeAll(", ");
}
- try writer.print("\"\"({}_constant)", .{reg});
+ try writer.print("\"\"({s}_constant)", .{reg});
} else {
// This is blocked by the earlier test
unreachable;
diff --git a/src/codegen/llvm.zig b/src/codegen/llvm.zig
new file mode 100644
index 0000000000..3a1ebada3b
--- /dev/null
+++ b/src/codegen/llvm.zig
@@ -0,0 +1,125 @@
+const std = @import("std");
+const Allocator = std.mem.Allocator;
+
+pub fn targetTriple(allocator: *Allocator, target: std.Target) ![]u8 {
+ const llvm_arch = switch (target.cpu.arch) {
+ .arm => "arm",
+ .armeb => "armeb",
+ .aarch64 => "aarch64",
+ .aarch64_be => "aarch64_be",
+ .aarch64_32 => "aarch64_32",
+ .arc => "arc",
+ .avr => "avr",
+ .bpfel => "bpfel",
+ .bpfeb => "bpfeb",
+ .hexagon => "hexagon",
+ .mips => "mips",
+ .mipsel => "mipsel",
+ .mips64 => "mips64",
+ .mips64el => "mips64el",
+ .msp430 => "msp430",
+ .powerpc => "powerpc",
+ .powerpc64 => "powerpc64",
+ .powerpc64le => "powerpc64le",
+ .r600 => "r600",
+ .amdgcn => "amdgcn",
+ .riscv32 => "riscv32",
+ .riscv64 => "riscv64",
+ .sparc => "sparc",
+ .sparcv9 => "sparcv9",
+ .sparcel => "sparcel",
+ .s390x => "s390x",
+ .tce => "tce",
+ .tcele => "tcele",
+ .thumb => "thumb",
+ .thumbeb => "thumbeb",
+ .i386 => "i386",
+ .x86_64 => "x86_64",
+ .xcore => "xcore",
+ .nvptx => "nvptx",
+ .nvptx64 => "nvptx64",
+ .le32 => "le32",
+ .le64 => "le64",
+ .amdil => "amdil",
+ .amdil64 => "amdil64",
+ .hsail => "hsail",
+ .hsail64 => "hsail64",
+ .spir => "spir",
+ .spir64 => "spir64",
+ .kalimba => "kalimba",
+ .shave => "shave",
+ .lanai => "lanai",
+ .wasm32 => "wasm32",
+ .wasm64 => "wasm64",
+ .renderscript32 => "renderscript32",
+ .renderscript64 => "renderscript64",
+ .ve => "ve",
+ .spu_2 => return error.LLVMBackendDoesNotSupportSPUMarkII,
+ };
+ // TODO Add a sub-arch for some architectures depending on CPU features.
+
+ const llvm_os = switch (target.os.tag) {
+ .freestanding => "unknown",
+ .ananas => "ananas",
+ .cloudabi => "cloudabi",
+ .dragonfly => "dragonfly",
+ .freebsd => "freebsd",
+ .fuchsia => "fuchsia",
+ .ios => "ios",
+ .kfreebsd => "kfreebsd",
+ .linux => "linux",
+ .lv2 => "lv2",
+ .macos => "macosx",
+ .netbsd => "netbsd",
+ .openbsd => "openbsd",
+ .solaris => "solaris",
+ .windows => "windows",
+ .haiku => "haiku",
+ .minix => "minix",
+ .rtems => "rtems",
+ .nacl => "nacl",
+ .cnk => "cnk",
+ .aix => "aix",
+ .cuda => "cuda",
+ .nvcl => "nvcl",
+ .amdhsa => "amdhsa",
+ .ps4 => "ps4",
+ .elfiamcu => "elfiamcu",
+ .tvos => "tvos",
+ .watchos => "watchos",
+ .mesa3d => "mesa3d",
+ .contiki => "contiki",
+ .amdpal => "amdpal",
+ .hermit => "hermit",
+ .hurd => "hurd",
+ .wasi => "wasi",
+ .emscripten => "emscripten",
+ .uefi => "windows",
+ .other => "unknown",
+ };
+
+ const llvm_abi = switch (target.abi) {
+ .none => "unknown",
+ .gnu => "gnu",
+ .gnuabin32 => "gnuabin32",
+ .gnuabi64 => "gnuabi64",
+ .gnueabi => "gnueabi",
+ .gnueabihf => "gnueabihf",
+ .gnux32 => "gnux32",
+ .code16 => "code16",
+ .eabi => "eabi",
+ .eabihf => "eabihf",
+ .android => "android",
+ .musl => "musl",
+ .musleabi => "musleabi",
+ .musleabihf => "musleabihf",
+ .msvc => "msvc",
+ .itanium => "itanium",
+ .cygnus => "cygnus",
+ .coreclr => "coreclr",
+ .simulator => "simulator",
+ .macabi => "macabi",
+ };
+
+ return std.fmt.allocPrint(allocator, "{s}-unknown-{s}-{s}", .{ llvm_arch, llvm_os, llvm_abi });
+}