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authorDavid Rubin <daviru007@icloud.com>2024-05-12 12:24:59 -0700
committerDavid Rubin <daviru007@icloud.com>2024-06-13 02:22:04 -0700
commit083b7b483e1ad83d62ed7029822a82fff14953c5 (patch)
tree3b534a1d71fa3bc1c511788d162db28b5250b470 /src/codegen
parentb67995689df424a0cab9186fcaf7b09bb04ffc1a (diff)
downloadzig-083b7b483e1ad83d62ed7029822a82fff14953c5.tar.gz
zig-083b7b483e1ad83d62ed7029822a82fff14953c5.zip
riscv: zero registers when using register-wide operations
what was happening is that instructions like `lb` were only affecting the lower bytes of the register and leaving the top dirty. this would lead to situtations were `cmp_eq` for example was using `xor`, which was failing because of the left-over stuff in the top of the register. with this commit, we now zero out or truncate depending on the context, to ensure instructions like xor will provide proper results.
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