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| author | Andrew Kelley <andrew@ziglang.org> | 2021-08-28 15:35:59 -0700 |
|---|---|---|
| committer | Andrew Kelley <andrew@ziglang.org> | 2021-09-01 17:54:06 -0700 |
| commit | 332eafeb7f3d866556ab767b960a04661bc43bc7 (patch) | |
| tree | d299cbc233ca756ca42885e66f54e2b08f2a3d9a /src/codegen/x86.zig | |
| parent | c05a20fc8c36742dab8792d15e79716da1a55759 (diff) | |
| download | zig-332eafeb7f3d866556ab767b960a04661bc43bc7.tar.gz zig-332eafeb7f3d866556ab767b960a04661bc43bc7.zip | |
stage2: first pass at implementing usingnamespace
Ran into a design flaw here which will need to get solved by having
AstGen annotate ZIR with which instructions are closed over.
Diffstat (limited to 'src/codegen/x86.zig')
| -rw-r--r-- | src/codegen/x86.zig | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/src/codegen/x86.zig b/src/codegen/x86.zig index fdad4e56db..5b981b9ef4 100644 --- a/src/codegen/x86.zig +++ b/src/codegen/x86.zig @@ -59,14 +59,14 @@ pub const Register = enum(u8) { pub fn dwarfLocOp(reg: Register) u8 { return switch (reg.to32()) { - .eax => DW.OP_reg0, - .ecx => DW.OP_reg1, - .edx => DW.OP_reg2, - .ebx => DW.OP_reg3, - .esp => DW.OP_reg4, - .ebp => DW.OP_reg5, - .esi => DW.OP_reg6, - .edi => DW.OP_reg7, + .eax => DW.OP.reg0, + .ecx => DW.OP.reg1, + .edx => DW.OP.reg2, + .ebx => DW.OP.reg3, + .esp => DW.OP.reg4, + .ebp => DW.OP.reg5, + .esi => DW.OP.reg6, + .edi => DW.OP.reg7, else => unreachable, }; } |