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authorAlex Rønne Petersen <alex@alexrp.com>2025-11-10 16:38:23 +0100
committerGitHub <noreply@github.com>2025-11-10 16:38:23 +0100
commitd182c7e3bc20b8f90bc43ed615a3faa43287a3e4 (patch)
treee66978f11f5650000f49c4604a68c05d3c22110b /src/codegen/c.zig
parent966809862fb0dee03fbb79eb6b907bb801a5176b (diff)
parentf34b5ce28844cdf3ec66c1f6b9feb3bcdae6434c (diff)
downloadzig-d182c7e3bc20b8f90bc43ed615a3faa43287a3e4.tar.gz
zig-d182c7e3bc20b8f90bc43ed615a3faa43287a3e4.zip
Merge pull request #25886 from alexrp/kvx
beginnings of KVX target support (via CBE)
Diffstat (limited to 'src/codegen/c.zig')
-rw-r--r--src/codegen/c.zig5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/codegen/c.zig b/src/codegen/c.zig
index 646cde788d..7341a9fd0b 100644
--- a/src/codegen/c.zig
+++ b/src/codegen/c.zig
@@ -5781,8 +5781,9 @@ fn airAsm(f: *Function, inst: Air.Inst.Index) !CValue {
c_name_buf[0] = '$';
break :name c_name;
} else if ((target.cpu.arch.isMIPS() and (mem.startsWith(u8, field_name, "fcc") or field_name[0] == 'w')) or
- ((target.cpu.arch.isMIPS() or target.cpu.arch == .alpha) and field_name[0] == 'f')) name: {
- // "$" prefix for FCC, W and F registers
+ ((target.cpu.arch.isMIPS() or target.cpu.arch == .alpha) and field_name[0] == 'f') or
+ (target.cpu.arch == .kvx and !mem.eql(u8, field_name, "memory"))) name: {
+ // "$" prefix for these registers
c_name_buf[0] = '$';
@memcpy((&c_name_buf)[1..][0..field_name.len], field_name);
break :name (&c_name_buf)[0 .. 1 + field_name.len];